gl_shader_decompiler: Implement LOP32I LogicOperation PassB.

Qt: Removed the Registers widget.

src/core/hle/service/hid/hid.cpp

@@ -94,7 +94,6 @@ private:
                 layout.header.latest_entry = (layout.header.latest_entry + 1) % HID_NUM_ENTRIES;
 
                 ControllerInputEntry& entry = layout.entries[layout.header.latest_entry];
-                entry.connection_state = ConnectionState_Connected | ConnectionState_Wired;
                 entry.timestamp++;
                 // TODO(shinyquagsire23): Is this always identical to timestamp?
                 entry.timestamp_2++;
@@ -103,6 +102,8 @@ private:
                 if (controller != Controller_Handheld)
                     continue;
 
+                entry.connection_state = ConnectionState_Connected | ConnectionState_Wired;
+
                 // TODO(shinyquagsire23): Set up some LUTs for each layout mapping in the future?
                 // For now everything is just the default handheld layout, but split Joy-Con will
                 // rotate the face buttons and directions for certain layouts.

src/core/hle/service/hid/hid.h

@@ -12,7 +12,7 @@ namespace Service::HID {
 // Begin enums and output structs
 
 constexpr u32 HID_NUM_ENTRIES = 17;
-constexpr u32 HID_NUM_LAYOUTS = 2;
+constexpr u32 HID_NUM_LAYOUTS = 7;
 constexpr s32 HID_JOYSTICK_MAX = 0x8000;
 constexpr s32 HID_JOYSTICK_MIN = -0x8000;
 

src/video_core/CMakeLists.txt

@@ -9,6 +9,8 @@ add_library(video_core STATIC
     engines/maxwell_3d.h
     engines/maxwell_compute.cpp
     engines/maxwell_compute.h
+    engines/maxwell_dma.cpp
+    engines/maxwell_dma.h
     engines/shader_bytecode.h
     gpu.cpp
     gpu.h

src/video_core/command_processor.cpp

@@ -16,6 +16,7 @@
 #include "video_core/engines/fermi_2d.h"
 #include "video_core/engines/maxwell_3d.h"
 #include "video_core/engines/maxwell_compute.h"
+#include "video_core/engines/maxwell_dma.h"
 #include "video_core/gpu.h"
 #include "video_core/renderer_base.h"
 #include "video_core/video_core.h"
@@ -60,8 +61,11 @@ void GPU::WriteReg(u32 method, u32 subchannel, u32 value, u32 remaining_params)
     case EngineID::MAXWELL_COMPUTE_B:
         maxwell_compute->WriteReg(method, value);
         break;
+    case EngineID::MAXWELL_DMA_COPY_A:
+        maxwell_dma->WriteReg(method, value);
+        break;
     default:
-        UNIMPLEMENTED();
+        UNIMPLEMENTED_MSG("Unimplemented engine");
     }
 }
 

src/video_core/engines/fermi_2d.cpp

@@ -47,6 +47,7 @@ void Fermi2D::HandleSurfaceCopy() {
 
     if (regs.src.linear == regs.dst.linear) {
         // If the input layout and the output layout are the same, just perform a raw copy.
+        ASSERT(regs.src.BlockHeight() == regs.dst.BlockHeight());
         Memory::CopyBlock(dest_cpu, source_cpu,
                           src_bytes_per_pixel * regs.dst.width * regs.dst.height);
         return;

src/video_core/engines/maxwell_dma.cpp

@@ -0,0 +1,69 @@
+// Copyright 2018 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#include "core/memory.h"
+#include "video_core/engines/maxwell_dma.h"
+#include "video_core/textures/decoders.h"
+
+namespace Tegra {
+namespace Engines {
+
+MaxwellDMA::MaxwellDMA(MemoryManager& memory_manager) : memory_manager(memory_manager) {}
+
+void MaxwellDMA::WriteReg(u32 method, u32 value) {
+    ASSERT_MSG(method < Regs::NUM_REGS,
+               "Invalid MaxwellDMA register, increase the size of the Regs structure");
+
+    regs.reg_array[method] = value;
+
+#define MAXWELLDMA_REG_INDEX(field_name)                                                           \
+    (offsetof(Tegra::Engines::MaxwellDMA::Regs, field_name) / sizeof(u32))
+
+    switch (method) {
+    case MAXWELLDMA_REG_INDEX(exec): {
+        HandleCopy();
+        break;
+    }
+    }
+
+#undef MAXWELLDMA_REG_INDEX
+}
+
+void MaxwellDMA::HandleCopy() {
+    NGLOG_WARNING(HW_GPU, "Requested a DMA copy");
+
+    const GPUVAddr source = regs.src_address.Address();
+    const GPUVAddr dest = regs.dst_address.Address();
+
+    const VAddr source_cpu = *memory_manager.GpuToCpuAddress(source);
+    const VAddr dest_cpu = *memory_manager.GpuToCpuAddress(dest);
+
+    // TODO(Subv): Perform more research and implement all features of this engine.
+    ASSERT(regs.exec.enable_swizzle == 0);
+    ASSERT(regs.exec.enable_2d == 1);
+    ASSERT(regs.exec.query_mode == Regs::QueryMode::None);
+    ASSERT(regs.exec.query_intr == Regs::QueryIntr::None);
+    ASSERT(regs.exec.copy_mode == Regs::CopyMode::Unk2);
+    ASSERT(regs.src_params.pos_x == 0);
+    ASSERT(regs.src_params.pos_y == 0);
+    ASSERT(regs.dst_params.pos_x == 0);
+    ASSERT(regs.dst_params.pos_y == 0);
+    ASSERT(regs.exec.is_dst_linear != regs.exec.is_src_linear);
+
+    u8* src_buffer = Memory::GetPointer(source_cpu);
+    u8* dst_buffer = Memory::GetPointer(dest_cpu);
+
+    if (regs.exec.is_dst_linear && !regs.exec.is_src_linear) {
+        // If the input is tiled and the output is linear, deswizzle the input and copy it over.
+        Texture::CopySwizzledData(regs.src_params.size_x, regs.src_params.size_y, 1, 1, src_buffer,
+                                  dst_buffer, true, regs.src_params.BlockHeight());
+    } else {
+        // If the input is linear and the output is tiled, swizzle the input and copy it over.
+        Texture::CopySwizzledData(regs.dst_params.size_x, regs.dst_params.size_y, 1, 1, dst_buffer,
+                                  src_buffer, false, regs.dst_params.BlockHeight());
+    }
+}
+
+} // namespace Engines
+} // namespace Tegra

src/video_core/engines/maxwell_dma.h

@@ -0,0 +1,155 @@
+// Copyright 2018 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#pragma once
+
+#include <array>
+#include "common/assert.h"
+#include "common/bit_field.h"
+#include "common/common_funcs.h"
+#include "common/common_types.h"
+#include "video_core/gpu.h"
+#include "video_core/memory_manager.h"
+
+namespace Tegra {
+namespace Engines {
+
+class MaxwellDMA final {
+public:
+    explicit MaxwellDMA(MemoryManager& memory_manager);
+    ~MaxwellDMA() = default;
+
+    /// Write the value to the register identified by method.
+    void WriteReg(u32 method, u32 value);
+
+    struct Regs {
+        static constexpr size_t NUM_REGS = 0x1D6;
+
+        struct Parameters {
+            union {
+                BitField<0, 4, u32> block_depth;
+                BitField<4, 4, u32> block_height;
+                BitField<8, 4, u32> block_width;
+            };
+            u32 size_x;
+            u32 size_y;
+            u32 size_z;
+            u32 pos_z;
+            union {
+                BitField<0, 16, u32> pos_x;
+                BitField<16, 16, u32> pos_y;
+            };
+
+            u32 BlockHeight() const {
+                return 1 << block_height;
+            }
+        };
+
+        static_assert(sizeof(Parameters) == 24, "Parameters has wrong size");
+
+        enum class CopyMode : u32 {
+            None = 0,
+            Unk1 = 1,
+            Unk2 = 2,
+        };
+
+        enum class QueryMode : u32 {
+            None = 0,
+            Short = 1,
+            Long = 2,
+        };
+
+        enum class QueryIntr : u32 {
+            None = 0,
+            Block = 1,
+            NonBlock = 2,
+        };
+
+        union {
+            struct {
+                INSERT_PADDING_WORDS(0xC0);
+
+                struct {
+                    union {
+                        BitField<0, 2, CopyMode> copy_mode;
+                        BitField<2, 1, u32> flush;
+
+                        BitField<3, 2, QueryMode> query_mode;
+                        BitField<5, 2, QueryIntr> query_intr;
+
+                        BitField<7, 1, u32> is_src_linear;
+                        BitField<8, 1, u32> is_dst_linear;
+
+                        BitField<9, 1, u32> enable_2d;
+                        BitField<10, 1, u32> enable_swizzle;
+                    };
+                } exec;
+
+                INSERT_PADDING_WORDS(0x3F);
+
+                struct {
+                    u32 address_high;
+                    u32 address_low;
+
+                    GPUVAddr Address() const {
+                        return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
+                                                     address_low);
+                    }
+                } src_address;
+
+                struct {
+                    u32 address_high;
+                    u32 address_low;
+
+                    GPUVAddr Address() const {
+                        return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
+                                                     address_low);
+                    }
+                } dst_address;
+
+                u32 src_pitch;
+                u32 dst_pitch;
+                u32 x_count;
+                u32 y_count;
+
+                INSERT_PADDING_WORDS(0xBB);
+
+                Parameters dst_params;
+
+                INSERT_PADDING_WORDS(1);
+
+                Parameters src_params;
+
+                INSERT_PADDING_WORDS(0x13);
+            };
+            std::array<u32, NUM_REGS> reg_array;
+        };
+    } regs{};
+
+    MemoryManager& memory_manager;
+
+private:
+    /// Performs the copy from the source buffer to the destination buffer as configured in the
+    /// registers.
+    void HandleCopy();
+};
+
+#define ASSERT_REG_POSITION(field_name, position)                                                  \
+    static_assert(offsetof(MaxwellDMA::Regs, field_name) == position * 4,                          \
+                  "Field " #field_name " has invalid position")
+
+ASSERT_REG_POSITION(exec, 0xC0);
+ASSERT_REG_POSITION(src_address, 0x100);
+ASSERT_REG_POSITION(dst_address, 0x102);
+ASSERT_REG_POSITION(src_pitch, 0x104);
+ASSERT_REG_POSITION(dst_pitch, 0x105);
+ASSERT_REG_POSITION(x_count, 0x106);
+ASSERT_REG_POSITION(y_count, 0x107);
+ASSERT_REG_POSITION(dst_params, 0x1C3);
+ASSERT_REG_POSITION(src_params, 0x1CA);
+
+#undef ASSERT_REG_POSITION
+
+} // namespace Engines
+} // namespace Tegra

src/video_core/engines/shader_bytecode.h

@@ -213,16 +213,15 @@ union Instruction {
     BitField<28, 8, Register> gpr28;
     BitField<39, 8, Register> gpr39;
     BitField<48, 16, u64> opcode;
-    BitField<50, 1, u64> saturate_a;
 
     union {
         BitField<20, 19, u64> imm20_19;
-        BitField<20, 32, u64> imm20_32;
+        BitField<20, 32, s64> imm20_32;
         BitField<45, 1, u64> negate_b;
         BitField<46, 1, u64> abs_a;
         BitField<48, 1, u64> negate_a;
         BitField<49, 1, u64> abs_b;
-        BitField<50, 1, u64> abs_d;
+        BitField<50, 1, u64> saturate_d;
         BitField<56, 1, u64> negate_imm;
 
         union {
@@ -247,7 +246,7 @@ union Instruction {
 
         float GetImm20_32() const {
             float result{};
-            u32 imm{static_cast<u32>(imm20_32)};
+            s32 imm{static_cast<s32>(imm20_32)};
             std::memcpy(&result, &imm, sizeof(imm));
             return result;
         }
@@ -270,6 +269,11 @@ union Instruction {
         BitField<49, 1, u64> negate_a;
     } alu_integer;
 
+    union {
+        BitField<54, 1, u64> saturate;
+        BitField<56, 1, u64> negate_a;
+    } iadd32i;
+
     union {
         BitField<20, 8, u64> shift_position;
         BitField<28, 8, u64> shift_length;
@@ -451,6 +455,7 @@ public:
         IADD_C,
         IADD_R,
         IADD_IMM,
+        IADD32I,
         ISCADD_C, // Scale and Add
         ISCADD_R,
         ISCADD_IMM,
@@ -510,6 +515,7 @@ public:
         Trivial,
         Arithmetic,
         ArithmeticInteger,
+        ArithmeticIntegerImmediate,
         Bfe,
         Logic,
         Shift,
@@ -642,6 +648,7 @@ private:
             INST("0100110000010---", Id::IADD_C, Type::ArithmeticInteger, "IADD_C"),
             INST("0101110000010---", Id::IADD_R, Type::ArithmeticInteger, "IADD_R"),
             INST("0011100-00010---", Id::IADD_IMM, Type::ArithmeticInteger, "IADD_IMM"),
+            INST("0001110---------", Id::IADD32I, Type::ArithmeticIntegerImmediate, "IADD32I"),
             INST("0100110000011---", Id::ISCADD_C, Type::ArithmeticInteger, "ISCADD_C"),
             INST("0101110000011---", Id::ISCADD_R, Type::ArithmeticInteger, "ISCADD_R"),
             INST("0011100-00011---", Id::ISCADD_IMM, Type::ArithmeticInteger, "ISCADD_IMM"),

src/video_core/gpu.cpp

@@ -5,6 +5,7 @@
 #include "video_core/engines/fermi_2d.h"
 #include "video_core/engines/maxwell_3d.h"
 #include "video_core/engines/maxwell_compute.h"
+#include "video_core/engines/maxwell_dma.h"
 #include "video_core/gpu.h"
 
 namespace Tegra {
@@ -14,6 +15,7 @@ GPU::GPU() {
     maxwell_3d = std::make_unique<Engines::Maxwell3D>(*memory_manager);
     fermi_2d = std::make_unique<Engines::Fermi2D>(*memory_manager);
     maxwell_compute = std::make_unique<Engines::MaxwellCompute>();
+    maxwell_dma = std::make_unique<Engines::MaxwellDMA>(*memory_manager);
 }
 
 GPU::~GPU() = default;

src/video_core/gpu.h

@@ -63,6 +63,7 @@ namespace Engines {
 class Fermi2D;
 class Maxwell3D;
 class MaxwellCompute;
+class MaxwellDMA;
 } // namespace Engines
 
 enum class EngineID {
@@ -103,6 +104,8 @@ private:
     std::unique_ptr<Engines::Fermi2D> fermi_2d;
     /// Compute engine
     std::unique_ptr<Engines::MaxwellCompute> maxwell_compute;
+    /// DMA engine
+    std::unique_ptr<Engines::MaxwellDMA> maxwell_dma;
 };
 
 } // namespace Tegra

src/video_core/renderer_opengl/gl_shader_decompiler.cpp

@@ -299,13 +299,15 @@ public:
      * @param value The code representing the value to assign.
      * @param dest_num_components Number of components in the destination.
      * @param value_num_components Number of components in the value.
-     * @param is_abs Optional, when True, applies absolute value to output.
+     * @param is_saturated Optional, when True, saturates the provided value.
      * @param dest_elem Optional, the destination element to use for the operation.
      */
     void SetRegisterToFloat(const Register& reg, u64 elem, const std::string& value,
-                            u64 dest_num_components, u64 value_num_components, bool is_abs = false,
-                            u64 dest_elem = 0) {
-        SetRegister(reg, elem, value, dest_num_components, value_num_components, is_abs, dest_elem);
+                            u64 dest_num_components, u64 value_num_components,
+                            bool is_saturated = false, u64 dest_elem = 0) {
+
+        SetRegister(reg, elem, is_saturated ? "clamp(" + value + ", 0.0, 1.0)" : value,
+                    dest_num_components, value_num_components, dest_elem);
     }
 
     /**
@@ -315,18 +317,21 @@ public:
      * @param value The code representing the value to assign.
      * @param dest_num_components Number of components in the destination.
      * @param value_num_components Number of components in the value.
-     * @param is_abs Optional, when True, applies absolute value to output.
+     * @param is_saturated Optional, when True, saturates the provided value.
      * @param dest_elem Optional, the destination element to use for the operation.
      */
     void SetRegisterToInteger(const Register& reg, bool is_signed, u64 elem,
                               const std::string& value, u64 dest_num_components,
-                              u64 value_num_components, bool is_abs = false, u64 dest_elem = 0) {
+                              u64 value_num_components, bool is_saturated = false,
+                              u64 dest_elem = 0) {
+        ASSERT_MSG(!is_saturated, "Unimplemented");
+
         const std::string func = GetGLSLConversionFunc(
             is_signed ? GLSLRegister::Type::Integer : GLSLRegister::Type::UnsignedInteger,
             GLSLRegister::Type::Float);
 
         SetRegister(reg, elem, func + '(' + value + ')', dest_num_components, value_num_components,
-                    is_abs, dest_elem);
+                    dest_elem);
     }
 
     /**
@@ -500,12 +505,10 @@ private:
      * @param value The code representing the value to assign.
      * @param dest_num_components Number of components in the destination.
      * @param value_num_components Number of components in the value.
-     * @param is_abs Optional, when True, applies absolute value to output.
      * @param dest_elem Optional, the destination element to use for the operation.
      */
     void SetRegister(const Register& reg, u64 elem, const std::string& value,
-                     u64 dest_num_components, u64 value_num_components, bool is_abs,
-                     u64 dest_elem) {
+                     u64 dest_num_components, u64 value_num_components, u64 dest_elem) {
         std::string dest = GetRegister(reg, dest_elem);
         if (dest_num_components > 1) {
             dest += GetSwizzle(elem);
@@ -516,8 +519,6 @@ private:
             src += GetSwizzle(elem);
         }
 
-        src = is_abs ? "abs(" + src + ')' : src;
-
         shader.AddLine(dest + " = " + src + ';');
     }
 
@@ -808,9 +809,8 @@ private:
             case OpCode::Id::FMUL_C:
             case OpCode::Id::FMUL_R:
             case OpCode::Id::FMUL_IMM: {
-                ASSERT_MSG(!instr.saturate_a, "Unimplemented");
-
-                regs.SetRegisterToFloat(instr.gpr0, 0, op_a + " * " + op_b, 1, 1, instr.alu.abs_d);
+                regs.SetRegisterToFloat(instr.gpr0, 0, op_a + " * " + op_b, 1, 1,
+                                        instr.alu.saturate_d);
                 break;
             }
             case OpCode::Id::FMUL32_IMM: {
@@ -823,41 +823,39 @@ private:
             case OpCode::Id::FADD_C:
             case OpCode::Id::FADD_R:
             case OpCode::Id::FADD_IMM: {
-                ASSERT_MSG(!instr.saturate_a, "Unimplemented");
-
-                regs.SetRegisterToFloat(instr.gpr0, 0, op_a + " + " + op_b, 1, 1, instr.alu.abs_d);
+                regs.SetRegisterToFloat(instr.gpr0, 0, op_a + " + " + op_b, 1, 1,
+                                        instr.alu.saturate_d);
                 break;
             }
             case OpCode::Id::MUFU: {
-                ASSERT_MSG(!instr.saturate_a, "Unimplemented");
-
                 switch (instr.sub_op) {
                 case SubOp::Cos:
                     regs.SetRegisterToFloat(instr.gpr0, 0, "cos(" + op_a + ')', 1, 1,
-                                            instr.alu.abs_d);
+                                            instr.alu.saturate_d);
                     break;
                 case SubOp::Sin:
                     regs.SetRegisterToFloat(instr.gpr0, 0, "sin(" + op_a + ')', 1, 1,
-                                            instr.alu.abs_d);
+                                            instr.alu.saturate_d);
                     break;
                 case SubOp::Ex2:
                     regs.SetRegisterToFloat(instr.gpr0, 0, "exp2(" + op_a + ')', 1, 1,
-                                            instr.alu.abs_d);
+                                            instr.alu.saturate_d);
                     break;
                 case SubOp::Lg2:
                     regs.SetRegisterToFloat(instr.gpr0, 0, "log2(" + op_a + ')', 1, 1,
-                                            instr.alu.abs_d);
+                                            instr.alu.saturate_d);
                     break;
                 case SubOp::Rcp:
-                    regs.SetRegisterToFloat(instr.gpr0, 0, "1.0 / " + op_a, 1, 1, instr.alu.abs_d);
+                    regs.SetRegisterToFloat(instr.gpr0, 0, "1.0 / " + op_a, 1, 1,
+                                            instr.alu.saturate_d);
                     break;
                 case SubOp::Rsq:
                     regs.SetRegisterToFloat(instr.gpr0, 0, "inversesqrt(" + op_a + ')', 1, 1,
-                                            instr.alu.abs_d);
+                                            instr.alu.saturate_d);
                     break;
                 case SubOp::Min:
                     regs.SetRegisterToFloat(instr.gpr0, 0, "min(" + op_a + "," + op_b + ')', 1, 1,
-                                            instr.alu.abs_d);
+                                            instr.alu.saturate_d);
                     break;
                 default:
                     NGLOG_CRITICAL(HW_GPU, "Unhandled MUFU sub op: {0:x}",
@@ -932,20 +930,26 @@ private:
                 if (instr.alu.lop.invert_b)
                     imm = ~imm;
 
+                std::string op_b = std::to_string(imm);
+
                 switch (instr.alu.lop.operation) {
                 case Tegra::Shader::LogicOperation::And: {
-                    regs.SetRegisterToInteger(instr.gpr0, true, 0,
-                                              '(' + op_a + " & " + std::to_string(imm) + ')', 1, 1);
+                    regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " & " + op_b + ')',
+                                              1, 1);
                     break;
                 }
                 case Tegra::Shader::LogicOperation::Or: {
-                    regs.SetRegisterToInteger(instr.gpr0, true, 0,
-                                              '(' + op_a + " | " + std::to_string(imm) + ')', 1, 1);
+                    regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " | " + op_b + ')',
+                                              1, 1);
                     break;
                 }
                 case Tegra::Shader::LogicOperation::Xor: {
-                    regs.SetRegisterToInteger(instr.gpr0, true, 0,
-                                              '(' + op_a + " ^ " + std::to_string(imm) + ')', 1, 1);
+                    regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " ^ " + op_b + ')',
+                                              1, 1);
+                    break;
+                }
+                case Tegra::Shader::LogicOperation::PassB: {
+                    regs.SetRegisterToInteger(instr.gpr0, true, 0, op_b, 1, 1);
                     break;
                 }
                 default:
@@ -1005,6 +1009,27 @@ private:
             break;
         }
 
+        case OpCode::Type::ArithmeticIntegerImmediate: {
+            std::string op_a = regs.GetRegisterAsInteger(instr.gpr8);
+
+            if (instr.iadd32i.negate_a)
+                op_a = '-' + op_a;
+
+            std::string op_b = '(' + std::to_string(instr.alu.imm20_32.Value()) + ')';
+
+            switch (opcode->GetId()) {
+            case OpCode::Id::IADD32I:
+                regs.SetRegisterToInteger(instr.gpr0, true, 0, op_a + " + " + op_b, 1, 1,
+                                          instr.iadd32i.saturate != 0);
+                break;
+            default: {
+                NGLOG_CRITICAL(HW_GPU, "Unhandled ArithmeticIntegerImmediate instruction: {}",
+                               opcode->GetName());
+                UNREACHABLE();
+            }
+            }
+            break;
+        }
         case OpCode::Type::ArithmeticInteger: {
             std::string op_a = regs.GetRegisterAsInteger(instr.gpr8);
 
@@ -1028,8 +1053,8 @@ private:
             case OpCode::Id::IADD_C:
             case OpCode::Id::IADD_R:
             case OpCode::Id::IADD_IMM: {
-                ASSERT_MSG(!instr.saturate_a, "Unimplemented");
-                regs.SetRegisterToInteger(instr.gpr0, true, 0, op_a + " + " + op_b, 1, 1);
+                regs.SetRegisterToInteger(instr.gpr0, true, 0, op_a + " + " + op_b, 1, 1,
+                                          instr.alu.saturate_d);
                 break;
             }
             case OpCode::Id::ISCADD_C:
@@ -1051,8 +1076,6 @@ private:
             break;
         }
         case OpCode::Type::Ffma: {
-            ASSERT_MSG(!instr.saturate_a, "Unimplemented");
-
             std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
             std::string op_b = instr.ffma.negate_b ? "-" : "";
             std::string op_c = instr.ffma.negate_c ? "-" : "";
@@ -1086,13 +1109,13 @@ private:
             }
             }
 
-            regs.SetRegisterToFloat(instr.gpr0, 0, op_a + " * " + op_b + " + " + op_c, 1, 1);
+            regs.SetRegisterToFloat(instr.gpr0, 0, op_a + " * " + op_b + " + " + op_c, 1, 1,
+                                    instr.alu.saturate_d);
             break;
         }
         case OpCode::Type::Conversion: {
             ASSERT_MSG(instr.conversion.size == Register::Size::Word, "Unimplemented");
             ASSERT_MSG(!instr.conversion.negate_a, "Unimplemented");
-            ASSERT_MSG(!instr.saturate_a, "Unimplemented");
 
             switch (opcode->GetId()) {
             case OpCode::Id::I2I_R: {
@@ -1106,7 +1129,7 @@ private:
                 }
 
                 regs.SetRegisterToInteger(instr.gpr0, instr.conversion.is_output_signed, 0, op_a, 1,
-                                          1);
+                                          1, instr.alu.saturate_d);
                 break;
             }
             case OpCode::Id::I2F_R: {
@@ -1122,8 +1145,6 @@ private:
                 break;
             }
             case OpCode::Id::F2F_R: {
-                ASSERT_MSG(!instr.saturate_a, "Unimplemented");
-
                 std::string op_a = regs.GetRegisterAsFloat(instr.gpr20);
 
                 switch (instr.conversion.f2f.rounding) {
@@ -1149,7 +1170,7 @@ private:
                     op_a = "abs(" + op_a + ')';
                 }
 
-                regs.SetRegisterToFloat(instr.gpr0, 0, op_a, 1, 1);
+                regs.SetRegisterToFloat(instr.gpr0, 0, op_a, 1, 1, instr.alu.saturate_d);
                 break;
             }
             case OpCode::Id::F2I_R: {

src/yuzu/CMakeLists.txt

@@ -32,8 +32,6 @@ add_executable(yuzu
     debugger/graphics/graphics_surface.h
     debugger/profiler.cpp
     debugger/profiler.h
-    debugger/registers.cpp
-    debugger/registers.h
     debugger/wait_tree.cpp
     debugger/wait_tree.h
     game_list.cpp
@@ -60,7 +58,6 @@ set(UIS
     configuration/configure_graphics.ui
     configuration/configure_input.ui
     configuration/configure_system.ui
-    debugger/registers.ui
     hotkeys.ui
     main.ui
 )

src/yuzu/debugger/registers.cpp

@@ -1,190 +0,0 @@
-// Copyright 2014 Citra Emulator Project
-// Licensed under GPLv2 or any later version
-// Refer to the license.txt file included.
-
-#include <QTreeWidgetItem>
-#include "core/arm/arm_interface.h"
-#include "core/core.h"
-#include "yuzu/debugger/registers.h"
-#include "yuzu/util/util.h"
-
-RegistersWidget::RegistersWidget(QWidget* parent) : QDockWidget(parent) {
-    cpu_regs_ui.setupUi(this);
-
-    tree = cpu_regs_ui.treeWidget;
-    tree->addTopLevelItem(core_registers = new QTreeWidgetItem(QStringList(tr("Registers"))));
-    tree->addTopLevelItem(vfp_registers = new QTreeWidgetItem(QStringList(tr("VFP Registers"))));
-    tree->addTopLevelItem(vfp_system_registers =
-                              new QTreeWidgetItem(QStringList(tr("VFP System Registers"))));
-    tree->addTopLevelItem(cpsr = new QTreeWidgetItem(QStringList("CPSR")));
-
-    for (int i = 0; i < 16; ++i) {
-        QTreeWidgetItem* child = new QTreeWidgetItem(QStringList(QString("R[%1]").arg(i)));
-        core_registers->addChild(child);
-    }
-
-    for (int i = 0; i < 32; ++i) {
-        QTreeWidgetItem* child = new QTreeWidgetItem(QStringList(QString("S[%1]").arg(i)));
-        vfp_registers->addChild(child);
-    }
-
-    QFont font = GetMonospaceFont();
-
-    CreateCPSRChildren();
-    CreateVFPSystemRegisterChildren();
-
-    // Set Registers to display in monospace font
-    for (int i = 0; i < core_registers->childCount(); ++i)
-        core_registers->child(i)->setFont(1, font);
-
-    for (int i = 0; i < vfp_registers->childCount(); ++i)
-        vfp_registers->child(i)->setFont(1, font);
-
-    for (int i = 0; i < vfp_system_registers->childCount(); ++i) {
-        vfp_system_registers->child(i)->setFont(1, font);
-        for (int x = 0; x < vfp_system_registers->child(i)->childCount(); ++x) {
-            vfp_system_registers->child(i)->child(x)->setFont(1, font);
-        }
-    }
-    // Set CSPR to display in monospace font
-    cpsr->setFont(1, font);
-    for (int i = 0; i < cpsr->childCount(); ++i) {
-        cpsr->child(i)->setFont(1, font);
-        for (int x = 0; x < cpsr->child(i)->childCount(); ++x) {
-            cpsr->child(i)->child(x)->setFont(1, font);
-        }
-    }
-    setEnabled(false);
-}
-
-void RegistersWidget::OnDebugModeEntered() {
-    if (!Core::System::GetInstance().IsPoweredOn())
-        return;
-
-    for (int i = 0; i < core_registers->childCount(); ++i)
-        core_registers->child(i)->setText(
-            1, QString("0x%1").arg(Core::CurrentArmInterface().GetReg(i), 8, 16, QLatin1Char('0')));
-
-    UpdateCPSRValues();
-}
-
-void RegistersWidget::OnDebugModeLeft() {}
-
-void RegistersWidget::OnEmulationStarting(EmuThread* emu_thread) {
-    setEnabled(true);
-}
-
-void RegistersWidget::OnEmulationStopping() {
-    // Reset widget text
-    for (int i = 0; i < core_registers->childCount(); ++i)
-        core_registers->child(i)->setText(1, QString(""));
-
-    for (int i = 0; i < vfp_registers->childCount(); ++i)
-        vfp_registers->child(i)->setText(1, QString(""));
-
-    for (int i = 0; i < cpsr->childCount(); ++i)
-        cpsr->child(i)->setText(1, QString(""));
-
-    cpsr->setText(1, QString(""));
-
-    // FPSCR
-    for (int i = 0; i < vfp_system_registers->child(0)->childCount(); ++i)
-        vfp_system_registers->child(0)->child(i)->setText(1, QString(""));
-
-    // FPEXC
-    for (int i = 0; i < vfp_system_registers->child(1)->childCount(); ++i)
-        vfp_system_registers->child(1)->child(i)->setText(1, QString(""));
-
-    vfp_system_registers->child(0)->setText(1, QString(""));
-    vfp_system_registers->child(1)->setText(1, QString(""));
-    vfp_system_registers->child(2)->setText(1, QString(""));
-    vfp_system_registers->child(3)->setText(1, QString(""));
-
-    setEnabled(false);
-}
-
-void RegistersWidget::CreateCPSRChildren() {
-    cpsr->addChild(new QTreeWidgetItem(QStringList("M")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("T")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("F")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("I")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("A")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("E")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("IT")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("GE")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("DNM")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("J")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("Q")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("V")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("C")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("Z")));
-    cpsr->addChild(new QTreeWidgetItem(QStringList("N")));
-}
-
-void RegistersWidget::UpdateCPSRValues() {
-    const u32 cpsr_val = Core::CurrentArmInterface().GetCPSR();
-
-    cpsr->setText(1, QString("0x%1").arg(cpsr_val, 8, 16, QLatin1Char('0')));
-    cpsr->child(0)->setText(
-        1, QString("b%1").arg(cpsr_val & 0x1F, 5, 2, QLatin1Char('0'))); // M - Mode
-    cpsr->child(1)->setText(1, QString::number((cpsr_val >> 5) & 1));    // T - State
-    cpsr->child(2)->setText(1, QString::number((cpsr_val >> 6) & 1));    // F - FIQ disable
-    cpsr->child(3)->setText(1, QString::number((cpsr_val >> 7) & 1));    // I - IRQ disable
-    cpsr->child(4)->setText(1, QString::number((cpsr_val >> 8) & 1));    // A - Imprecise abort
-    cpsr->child(5)->setText(1, QString::number((cpsr_val >> 9) & 1));    // E - Data endianness
-    cpsr->child(6)->setText(1,
-                            QString::number((cpsr_val >> 10) & 0x3F)); // IT - If-Then state (DNM)
-    cpsr->child(7)->setText(1,
-                            QString::number((cpsr_val >> 16) & 0xF)); // GE - Greater-than-or-Equal
-    cpsr->child(8)->setText(1, QString::number((cpsr_val >> 20) & 0xF)); // DNM - Do not modify
-    cpsr->child(9)->setText(1, QString::number((cpsr_val >> 24) & 1));   // J - Jazelle
-    cpsr->child(10)->setText(1, QString::number((cpsr_val >> 27) & 1));  // Q - Saturation
-    cpsr->child(11)->setText(1, QString::number((cpsr_val >> 28) & 1));  // V - Overflow
-    cpsr->child(12)->setText(1, QString::number((cpsr_val >> 29) & 1));  // C - Carry/Borrow/Extend
-    cpsr->child(13)->setText(1, QString::number((cpsr_val >> 30) & 1));  // Z - Zero
-    cpsr->child(14)->setText(1, QString::number((cpsr_val >> 31) & 1));  // N - Negative/Less than
-}
-
-void RegistersWidget::CreateVFPSystemRegisterChildren() {
-    QTreeWidgetItem* const fpscr = new QTreeWidgetItem(QStringList("FPSCR"));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("IOC")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("DZC")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("OFC")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("UFC")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("IXC")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("IDC")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("IOE")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("DZE")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("OFE")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("UFE")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("IXE")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("IDE")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList(tr("Vector Length"))));
-    fpscr->addChild(new QTreeWidgetItem(QStringList(tr("Vector Stride"))));
-    fpscr->addChild(new QTreeWidgetItem(QStringList(tr("Rounding Mode"))));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("FZ")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("DN")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("V")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("C")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("Z")));
-    fpscr->addChild(new QTreeWidgetItem(QStringList("N")));
-
-    QTreeWidgetItem* const fpexc = new QTreeWidgetItem(QStringList("FPEXC"));
-    fpexc->addChild(new QTreeWidgetItem(QStringList("IOC")));
-    fpexc->addChild(new QTreeWidgetItem(QStringList("OFC")));
-    fpexc->addChild(new QTreeWidgetItem(QStringList("UFC")));
-    fpexc->addChild(new QTreeWidgetItem(QStringList("INV")));
-    fpexc->addChild(new QTreeWidgetItem(QStringList(tr("Vector Iteration Count"))));
-    fpexc->addChild(new QTreeWidgetItem(QStringList("FP2V")));
-    fpexc->addChild(new QTreeWidgetItem(QStringList("EN")));
-    fpexc->addChild(new QTreeWidgetItem(QStringList("EX")));
-
-    vfp_system_registers->addChild(fpscr);
-    vfp_system_registers->addChild(fpexc);
-    vfp_system_registers->addChild(new QTreeWidgetItem(QStringList("FPINST")));
-    vfp_system_registers->addChild(new QTreeWidgetItem(QStringList("FPINST2")));
-}
-
-void RegistersWidget::UpdateVFPSystemRegisterValues() {
-    UNIMPLEMENTED();
-}

src/yuzu/debugger/registers.h

@@ -1,42 +0,0 @@
-// Copyright 2014 Citra Emulator Project
-// Licensed under GPLv2 or any later version
-// Refer to the license.txt file included.
-
-#pragma once
-
-#include <QDockWidget>
-#include "ui_registers.h"
-
-class QTreeWidget;
-class QTreeWidgetItem;
-class EmuThread;
-
-class RegistersWidget : public QDockWidget {
-    Q_OBJECT
-
-public:
-    explicit RegistersWidget(QWidget* parent = nullptr);
-
-public slots:
-    void OnDebugModeEntered();
-    void OnDebugModeLeft();
-
-    void OnEmulationStarting(EmuThread* emu_thread);
-    void OnEmulationStopping();
-
-private:
-    void CreateCPSRChildren();
-    void UpdateCPSRValues();
-
-    void CreateVFPSystemRegisterChildren();
-    void UpdateVFPSystemRegisterValues();
-
-    Ui::ARMRegisters cpu_regs_ui;
-
-    QTreeWidget* tree;
-
-    QTreeWidgetItem* core_registers;
-    QTreeWidgetItem* vfp_registers;
-    QTreeWidgetItem* vfp_system_registers;
-    QTreeWidgetItem* cpsr;
-};

src/yuzu/debugger/registers.ui

@@ -1,40 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<ui version="4.0">
- <class>ARMRegisters</class>
- <widget class="QDockWidget" name="ARMRegisters">
-  <property name="geometry">
-   <rect>
-    <x>0</x>
-    <y>0</y>
-    <width>400</width>
-    <height>300</height>
-   </rect>
-  </property>
-  <property name="windowTitle">
-   <string>ARM Registers</string>
-  </property>
-  <widget class="QWidget" name="dockWidgetContents">
-   <layout class="QVBoxLayout" name="verticalLayout">
-    <item>
-     <widget class="QTreeWidget" name="treeWidget">
-      <property name="alternatingRowColors">
-       <bool>true</bool>
-      </property>
-      <column>
-       <property name="text">
-        <string>Register</string>
-       </property>
-      </column>
-      <column>
-       <property name="text">
-        <string>Value</string>
-       </property>
-      </column>
-     </widget>
-    </item>
-   </layout>
-  </widget>
- </widget>
- <resources/>
- <connections/>
-</ui>

src/yuzu/main.cpp

@@ -33,7 +33,6 @@
 #include "yuzu/debugger/graphics/graphics_breakpoints.h"
 #include "yuzu/debugger/graphics/graphics_surface.h"
 #include "yuzu/debugger/profiler.h"
-#include "yuzu/debugger/registers.h"
 #include "yuzu/debugger/wait_tree.h"
 #include "yuzu/game_list.h"
 #include "yuzu/hotkeys.h"
@@ -169,15 +168,6 @@ void GMainWindow::InitializeDebugWidgets() {
     debug_menu->addAction(microProfileDialog->toggleViewAction());
 #endif
 
-    registersWidget = new RegistersWidget(this);
-    addDockWidget(Qt::RightDockWidgetArea, registersWidget);
-    registersWidget->hide();
-    debug_menu->addAction(registersWidget->toggleViewAction());
-    connect(this, &GMainWindow::EmulationStarting, registersWidget,
-            &RegistersWidget::OnEmulationStarting);
-    connect(this, &GMainWindow::EmulationStopping, registersWidget,
-            &RegistersWidget::OnEmulationStopping);
-
     graphicsBreakpointsWidget = new GraphicsBreakPointsWidget(debug_context, this);
     addDockWidget(Qt::RightDockWidgetArea, graphicsBreakpointsWidget);
     graphicsBreakpointsWidget->hide();
@@ -460,17 +450,12 @@ void GMainWindow::BootGame(const QString& filename) {
     connect(render_window, &GRenderWindow::Closed, this, &GMainWindow::OnStopGame);
     // BlockingQueuedConnection is important here, it makes sure we've finished refreshing our views
     // before the CPU continues
-    connect(emu_thread.get(), &EmuThread::DebugModeEntered, registersWidget,
-            &RegistersWidget::OnDebugModeEntered, Qt::BlockingQueuedConnection);
     connect(emu_thread.get(), &EmuThread::DebugModeEntered, waitTreeWidget,
             &WaitTreeWidget::OnDebugModeEntered, Qt::BlockingQueuedConnection);
-    connect(emu_thread.get(), &EmuThread::DebugModeLeft, registersWidget,
-            &RegistersWidget::OnDebugModeLeft, Qt::BlockingQueuedConnection);
     connect(emu_thread.get(), &EmuThread::DebugModeLeft, waitTreeWidget,
             &WaitTreeWidget::OnDebugModeLeft, Qt::BlockingQueuedConnection);
 
     // Update the GUI
-    registersWidget->OnDebugModeEntered();
     if (ui.action_Single_Window_Mode->isChecked()) {
         game_list->hide();
     }

src/yuzu/main.h

@@ -19,7 +19,6 @@ class GraphicsSurfaceWidget;
 class GRenderWindow;
 class MicroProfileDialog;
 class ProfilerWidget;
-class RegistersWidget;
 class WaitTreeWidget;
 
 namespace Tegra {
@@ -163,7 +162,6 @@ private:
     // Debugger panes
     ProfilerWidget* profilerWidget;
     MicroProfileDialog* microProfileDialog;
-    RegistersWidget* registersWidget;
     GraphicsBreakPointsWidget* graphicsBreakpointsWidget;
     GraphicsSurfaceWidget* graphicsSurfaceWidget;
     WaitTreeWidget* waitTreeWidget;