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__refs_pul
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__refs_pul
| Author | SHA1 | Date | |
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659a612368 | ||
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bec05db746 | ||
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d03fc77475 | ||
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2e0a9f66a0 |
@@ -12,10 +12,13 @@
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/gdbstub/gdbstub.h"
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#include "core/hle/kernel/client_port.h"
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#include "core/hle/kernel/kernel.h"
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#include "core/hle/kernel/process.h"
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#include "core/hle/kernel/thread.h"
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#include "core/hle/service/service.h"
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#include "core/hle/service/sm/controller.h"
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#include "core/hle/service/sm/sm.h"
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#include "core/hw/hw.h"
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#include "core/loader/loader.h"
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#include "core/memory_setup.h"
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@@ -26,6 +29,8 @@ namespace Core {
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/*static*/ System System::s_instance;
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System::~System() = default;
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System::ResultStatus System::RunLoop(bool tight_loop) {
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status = ResultStatus::Success;
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if (!cpu_core) {
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@@ -167,10 +172,12 @@ System::ResultStatus System::Init(EmuWindow* emu_window, u32 system_mode) {
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telemetry_session = std::make_unique<Core::TelemetrySession>();
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service_manager = std::make_shared<Service::SM::ServiceManager>();
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HW::Init();
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Kernel::Init(system_mode);
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scheduler = std::make_unique<Kernel::Scheduler>(cpu_core.get());
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Service::Init();
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Service::Init(service_manager);
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GDBStub::Init();
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if (!VideoCore::Init(emu_window)) {
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@@ -200,17 +207,26 @@ void System::Shutdown() {
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VideoCore::Shutdown();
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GDBStub::Shutdown();
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Service::Shutdown();
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scheduler = nullptr;
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scheduler.reset();
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Kernel::Shutdown();
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HW::Shutdown();
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telemetry_session = nullptr;
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gpu_core = nullptr;
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cpu_core = nullptr;
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service_manager.reset();
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telemetry_session.reset();
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gpu_core.reset();
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cpu_core.reset();
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CoreTiming::Shutdown();
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app_loader = nullptr;
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app_loader.reset();
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LOG_DEBUG(Core, "Shutdown OK");
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}
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Service::SM::ServiceManager& System::ServiceManager() {
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return *service_manager;
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}
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const Service::SM::ServiceManager& System::ServiceManager() const {
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return *service_manager;
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}
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} // namespace Core
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@@ -19,10 +19,16 @@
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class EmuWindow;
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class ARM_Interface;
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namespace Service::SM {
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class ServiceManager;
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}
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namespace Core {
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class System {
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public:
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~System();
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/**
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* Gets the instance of the System singleton class.
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* @returns Reference to the instance of the System singleton class.
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@@ -137,6 +143,9 @@ public:
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return *app_loader;
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}
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Service::SM::ServiceManager& ServiceManager();
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const Service::SM::ServiceManager& ServiceManager() const;
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void SetGPUDebugContext(std::shared_ptr<Tegra::DebugContext> context) {
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debug_context = std::move(context);
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}
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@@ -171,6 +180,9 @@ private:
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/// When true, signals that a reschedule should happen
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bool reschedule_pending{};
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/// Service manager
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std::shared_ptr<Service::SM::ServiceManager> service_manager;
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/// Telemetry session for this emulation session
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std::unique_ptr<Core::TelemetrySession> telemetry_session;
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@@ -34,57 +34,57 @@ SharedPtr<ResourceLimit> ResourceLimit::GetForCategory(ResourceLimitCategory cat
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}
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}
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s32 ResourceLimit::GetCurrentResourceValue(u32 resource) const {
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s32 ResourceLimit::GetCurrentResourceValue(ResourceType resource) const {
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switch (resource) {
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case COMMIT:
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case ResourceType::Commit:
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return current_commit;
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case THREAD:
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case ResourceType::Thread:
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return current_threads;
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case EVENT:
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case ResourceType::Event:
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return current_events;
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case MUTEX:
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case ResourceType::Mutex:
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return current_mutexes;
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case SEMAPHORE:
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case ResourceType::Semaphore:
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return current_semaphores;
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case TIMER:
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case ResourceType::Timer:
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return current_timers;
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case SHARED_MEMORY:
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case ResourceType::SharedMemory:
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return current_shared_mems;
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case ADDRESS_ARBITER:
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case ResourceType::AddressArbiter:
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return current_address_arbiters;
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case CPU_TIME:
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case ResourceType::CPUTime:
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return current_cpu_time;
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default:
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LOG_ERROR(Kernel, "Unknown resource type=%08X", resource);
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LOG_ERROR(Kernel, "Unknown resource type=%08X", static_cast<u32>(resource));
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UNIMPLEMENTED();
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return 0;
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}
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}
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u32 ResourceLimit::GetMaxResourceValue(u32 resource) const {
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u32 ResourceLimit::GetMaxResourceValue(ResourceType resource) const {
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switch (resource) {
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case PRIORITY:
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case ResourceType::Priority:
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return max_priority;
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case COMMIT:
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case ResourceType::Commit:
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return max_commit;
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case THREAD:
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case ResourceType::Thread:
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return max_threads;
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case EVENT:
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case ResourceType::Event:
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return max_events;
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case MUTEX:
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case ResourceType::Mutex:
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return max_mutexes;
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case SEMAPHORE:
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case ResourceType::Semaphore:
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return max_semaphores;
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case TIMER:
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case ResourceType::Timer:
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return max_timers;
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case SHARED_MEMORY:
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case ResourceType::SharedMemory:
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return max_shared_mems;
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case ADDRESS_ARBITER:
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case ResourceType::AddressArbiter:
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return max_address_arbiters;
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case CPU_TIME:
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case ResourceType::CPUTime:
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return max_cpu_time;
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default:
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LOG_ERROR(Kernel, "Unknown resource type=%08X", resource);
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LOG_ERROR(Kernel, "Unknown resource type=%08X", static_cast<u32>(resource));
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UNIMPLEMENTED();
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return 0;
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}
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@@ -16,17 +16,17 @@ enum class ResourceLimitCategory : u8 {
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OTHER = 3
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};
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enum ResourceTypes {
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PRIORITY = 0,
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COMMIT = 1,
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THREAD = 2,
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EVENT = 3,
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MUTEX = 4,
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SEMAPHORE = 5,
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TIMER = 6,
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SHARED_MEMORY = 7,
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ADDRESS_ARBITER = 8,
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CPU_TIME = 9,
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enum class ResourceType {
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Priority = 0,
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Commit = 1,
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Thread = 2,
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Event = 3,
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Mutex = 4,
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Semaphore = 5,
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Timer = 6,
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SharedMemory = 7,
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AddressArbiter = 8,
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CPUTime = 9,
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};
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class ResourceLimit final : public Object {
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@@ -60,14 +60,14 @@ public:
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* @param resource Requested resource type
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* @returns The current value of the resource type
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*/
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s32 GetCurrentResourceValue(u32 resource) const;
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s32 GetCurrentResourceValue(ResourceType resource) const;
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/**
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* Gets the max value for the specified resource.
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* @param resource Requested resource type
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* @returns The max value of the resource type
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*/
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u32 GetMaxResourceValue(u32 resource) const;
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u32 GetMaxResourceValue(ResourceType resource) const;
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/// Name of resource limit object.
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std::string name;
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@@ -407,7 +407,7 @@ static ResultCode SetThreadPriority(Handle handle, u32 priority) {
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// Note: The kernel uses the current process's resource limit instead of
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// the one from the thread owner's resource limit.
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SharedPtr<ResourceLimit>& resource_limit = Core::CurrentProcess()->resource_limit;
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if (resource_limit->GetMaxResourceValue(ResourceTypes::PRIORITY) > priority) {
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if (resource_limit->GetMaxResourceValue(ResourceType::Priority) > priority) {
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return ERR_NOT_AUTHORIZED;
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}
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@@ -541,7 +541,7 @@ static ResultCode CreateThread(Handle* out_handle, VAddr entry_point, u64 arg, V
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}
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SharedPtr<ResourceLimit>& resource_limit = Core::CurrentProcess()->resource_limit;
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if (resource_limit->GetMaxResourceValue(ResourceTypes::PRIORITY) > priority) {
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if (resource_limit->GetMaxResourceValue(ResourceType::Priority) > priority) {
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return ERR_NOT_AUTHORIZED;
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}
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@@ -145,7 +145,7 @@ ResultCode ServiceFrameworkBase::HandleSyncRequest(Kernel::HLERequestContext& co
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return ResultCode(ErrorModule::HIPC, ErrorDescription::RemoteProcessDead);
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}
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case IPC::CommandType::Control: {
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SM::g_service_manager->InvokeControlRequest(context);
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Core::System::GetInstance().ServiceManager().InvokeControlRequest(context);
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break;
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}
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case IPC::CommandType::Request: {
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@@ -170,42 +170,40 @@ void AddNamedPort(std::string name, SharedPtr<ClientPort> port) {
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}
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/// Initialize ServiceManager
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void Init() {
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void Init(std::shared_ptr<SM::ServiceManager>& sm) {
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// NVFlinger needs to be accessed by several services like Vi and AppletOE so we instantiate it
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// here and pass it into the respective InstallInterfaces functions.
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auto nv_flinger = std::make_shared<NVFlinger::NVFlinger>();
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SM::g_service_manager = std::make_shared<SM::ServiceManager>();
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SM::ServiceManager::InstallInterfaces(SM::g_service_manager);
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SM::ServiceManager::InstallInterfaces(sm);
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Account::InstallInterfaces(*SM::g_service_manager);
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AM::InstallInterfaces(*SM::g_service_manager, nv_flinger);
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AOC::InstallInterfaces(*SM::g_service_manager);
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APM::InstallInterfaces(*SM::g_service_manager);
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Audio::InstallInterfaces(*SM::g_service_manager);
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Fatal::InstallInterfaces(*SM::g_service_manager);
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FileSystem::InstallInterfaces(*SM::g_service_manager);
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Friend::InstallInterfaces(*SM::g_service_manager);
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HID::InstallInterfaces(*SM::g_service_manager);
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LM::InstallInterfaces(*SM::g_service_manager);
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NFP::InstallInterfaces(*SM::g_service_manager);
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NIFM::InstallInterfaces(*SM::g_service_manager);
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NS::InstallInterfaces(*SM::g_service_manager);
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Nvidia::InstallInterfaces(*SM::g_service_manager);
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PCTL::InstallInterfaces(*SM::g_service_manager);
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Sockets::InstallInterfaces(*SM::g_service_manager);
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SPL::InstallInterfaces(*SM::g_service_manager);
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SSL::InstallInterfaces(*SM::g_service_manager);
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Time::InstallInterfaces(*SM::g_service_manager);
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VI::InstallInterfaces(*SM::g_service_manager, nv_flinger);
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Set::InstallInterfaces(*SM::g_service_manager);
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Account::InstallInterfaces(*sm);
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AM::InstallInterfaces(*sm, nv_flinger);
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AOC::InstallInterfaces(*sm);
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APM::InstallInterfaces(*sm);
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Audio::InstallInterfaces(*sm);
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Fatal::InstallInterfaces(*sm);
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FileSystem::InstallInterfaces(*sm);
|
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Friend::InstallInterfaces(*sm);
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HID::InstallInterfaces(*sm);
|
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LM::InstallInterfaces(*sm);
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NFP::InstallInterfaces(*sm);
|
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NIFM::InstallInterfaces(*sm);
|
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NS::InstallInterfaces(*sm);
|
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Nvidia::InstallInterfaces(*sm);
|
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PCTL::InstallInterfaces(*sm);
|
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Sockets::InstallInterfaces(*sm);
|
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SPL::InstallInterfaces(*sm);
|
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SSL::InstallInterfaces(*sm);
|
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Time::InstallInterfaces(*sm);
|
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VI::InstallInterfaces(*sm, nv_flinger);
|
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Set::InstallInterfaces(*sm);
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|
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LOG_DEBUG(Service, "initialized OK");
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}
|
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|
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/// Shutdown ServiceManager
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||||
void Shutdown() {
|
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SM::g_service_manager = nullptr;
|
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g_kernel_named_ports.clear();
|
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LOG_DEBUG(Service, "shutdown OK");
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}
|
||||
|
||||
@@ -178,7 +178,7 @@ private:
|
||||
};
|
||||
|
||||
/// Initialize ServiceManager
|
||||
void Init();
|
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void Init(std::shared_ptr<SM::ServiceManager>& sm);
|
||||
|
||||
/// Shutdown ServiceManager
|
||||
void Shutdown();
|
||||
|
||||
@@ -14,6 +14,8 @@
|
||||
|
||||
namespace Service::SM {
|
||||
|
||||
ServiceManager::~ServiceManager() = default;
|
||||
|
||||
void ServiceManager::InvokeControlRequest(Kernel::HLERequestContext& context) {
|
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controller_interface->InvokeRequest(context);
|
||||
}
|
||||
@@ -72,7 +74,7 @@ ResultVal<Kernel::SharedPtr<Kernel::ClientSession>> ServiceManager::ConnectToSer
|
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return client_port->Connect();
|
||||
}
|
||||
|
||||
std::shared_ptr<ServiceManager> g_service_manager;
|
||||
SM::~SM() = default;
|
||||
|
||||
/**
|
||||
* SM::Initialize service function
|
||||
|
||||
@@ -23,7 +23,7 @@ namespace Service::SM {
|
||||
class SM final : public ServiceFramework<SM> {
|
||||
public:
|
||||
SM(std::shared_ptr<ServiceManager> service_manager);
|
||||
~SM() = default;
|
||||
~SM() override;
|
||||
|
||||
private:
|
||||
void Initialize(Kernel::HLERequestContext& ctx);
|
||||
@@ -44,6 +44,8 @@ class ServiceManager {
|
||||
public:
|
||||
static void InstallInterfaces(std::shared_ptr<ServiceManager> self);
|
||||
|
||||
~ServiceManager();
|
||||
|
||||
ResultVal<Kernel::SharedPtr<Kernel::ServerPort>> RegisterService(std::string name,
|
||||
unsigned int max_sessions);
|
||||
ResultVal<Kernel::SharedPtr<Kernel::ClientPort>> GetServicePort(const std::string& name);
|
||||
@@ -59,6 +61,4 @@ private:
|
||||
std::unordered_map<std::string, Kernel::SharedPtr<Kernel::ClientPort>> registered_services;
|
||||
};
|
||||
|
||||
extern std::shared_ptr<ServiceManager> g_service_manager;
|
||||
|
||||
} // namespace Service::SM
|
||||
|
||||
@@ -4,15 +4,24 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <bitset>
|
||||
#include <cstring>
|
||||
#include <map>
|
||||
#include <string>
|
||||
#include <vector>
|
||||
|
||||
#include <boost/optional.hpp>
|
||||
|
||||
#include "common/bit_field.h"
|
||||
#include "common/common_types.h"
|
||||
|
||||
namespace Tegra {
|
||||
namespace Shader {
|
||||
|
||||
struct Register {
|
||||
// Register 255 is special cased to always be 0
|
||||
static constexpr size_t ZeroIndex = 255;
|
||||
|
||||
constexpr Register() = default;
|
||||
|
||||
constexpr Register(u64 value) : value(value) {}
|
||||
@@ -86,181 +95,12 @@ union Uniform {
|
||||
BitField<34, 5, u64> index;
|
||||
};
|
||||
|
||||
union OpCode {
|
||||
enum class Id : u64 {
|
||||
TEXS = 0x6C,
|
||||
IPA = 0xE0,
|
||||
FMUL32_IMM = 0x1E,
|
||||
FFMA_IMM = 0x65,
|
||||
FFMA_CR = 0x93,
|
||||
FFMA_RC = 0xA3,
|
||||
FFMA_RR = 0xB3,
|
||||
|
||||
FADD_C = 0x98B,
|
||||
FMUL_C = 0x98D,
|
||||
MUFU = 0xA10,
|
||||
FADD_R = 0xB8B,
|
||||
FMUL_R = 0xB8D,
|
||||
LD_A = 0x1DFB,
|
||||
ST_A = 0x1DFE,
|
||||
|
||||
FSETP_R = 0x5BB,
|
||||
FSETP_C = 0x4BB,
|
||||
EXIT = 0xE30,
|
||||
KIL = 0xE33,
|
||||
|
||||
FMUL_IMM = 0x70D,
|
||||
FMUL_IMM_x = 0x72D,
|
||||
FADD_IMM = 0x70B,
|
||||
FADD_IMM_x = 0x72B,
|
||||
};
|
||||
|
||||
enum class Type {
|
||||
Trivial,
|
||||
Arithmetic,
|
||||
Ffma,
|
||||
Flow,
|
||||
Memory,
|
||||
Unknown,
|
||||
};
|
||||
|
||||
struct Info {
|
||||
Type type;
|
||||
std::string name;
|
||||
};
|
||||
|
||||
OpCode() = default;
|
||||
|
||||
constexpr OpCode(Id value) : value(static_cast<u64>(value)) {}
|
||||
|
||||
constexpr OpCode(u64 value) : value{value} {}
|
||||
|
||||
constexpr Id EffectiveOpCode() const {
|
||||
switch (op1) {
|
||||
case Id::TEXS:
|
||||
return op1;
|
||||
}
|
||||
|
||||
switch (op2) {
|
||||
case Id::IPA:
|
||||
case Id::FMUL32_IMM:
|
||||
return op2;
|
||||
}
|
||||
|
||||
switch (op3) {
|
||||
case Id::FFMA_IMM:
|
||||
case Id::FFMA_CR:
|
||||
case Id::FFMA_RC:
|
||||
case Id::FFMA_RR:
|
||||
return op3;
|
||||
}
|
||||
|
||||
switch (op4) {
|
||||
case Id::EXIT:
|
||||
case Id::FSETP_R:
|
||||
case Id::FSETP_C:
|
||||
case Id::KIL:
|
||||
return op4;
|
||||
}
|
||||
|
||||
switch (op5) {
|
||||
case Id::MUFU:
|
||||
case Id::LD_A:
|
||||
case Id::ST_A:
|
||||
case Id::FADD_R:
|
||||
case Id::FADD_C:
|
||||
case Id::FMUL_R:
|
||||
case Id::FMUL_C:
|
||||
return op5;
|
||||
|
||||
case Id::FMUL_IMM:
|
||||
case Id::FMUL_IMM_x:
|
||||
return Id::FMUL_IMM;
|
||||
|
||||
case Id::FADD_IMM:
|
||||
case Id::FADD_IMM_x:
|
||||
return Id::FADD_IMM;
|
||||
}
|
||||
|
||||
return static_cast<Id>(value);
|
||||
}
|
||||
|
||||
static const Info& GetInfo(const OpCode& opcode) {
|
||||
static const std::map<Id, Info> info_table{BuildInfoTable()};
|
||||
const auto& search{info_table.find(opcode.EffectiveOpCode())};
|
||||
if (search != info_table.end()) {
|
||||
return search->second;
|
||||
}
|
||||
|
||||
static const Info unknown{Type::Unknown, "UNK"};
|
||||
return unknown;
|
||||
}
|
||||
|
||||
constexpr operator Id() const {
|
||||
return static_cast<Id>(value);
|
||||
}
|
||||
|
||||
constexpr OpCode operator<<(size_t bits) const {
|
||||
return value << bits;
|
||||
}
|
||||
|
||||
constexpr OpCode operator>>(size_t bits) const {
|
||||
return value >> bits;
|
||||
}
|
||||
|
||||
template <typename T>
|
||||
constexpr u64 operator-(const T& oth) const {
|
||||
return value - oth;
|
||||
}
|
||||
|
||||
constexpr u64 operator&(const OpCode& oth) const {
|
||||
return value & oth.value;
|
||||
}
|
||||
|
||||
constexpr u64 operator~() const {
|
||||
return ~value;
|
||||
}
|
||||
|
||||
static std::map<Id, Info> BuildInfoTable() {
|
||||
std::map<Id, Info> info_table;
|
||||
info_table[Id::TEXS] = {Type::Memory, "texs"};
|
||||
info_table[Id::LD_A] = {Type::Memory, "ld_a"};
|
||||
info_table[Id::ST_A] = {Type::Memory, "st_a"};
|
||||
info_table[Id::MUFU] = {Type::Arithmetic, "mufu"};
|
||||
info_table[Id::FFMA_IMM] = {Type::Ffma, "ffma_imm"};
|
||||
info_table[Id::FFMA_CR] = {Type::Ffma, "ffma_cr"};
|
||||
info_table[Id::FFMA_RC] = {Type::Ffma, "ffma_rc"};
|
||||
info_table[Id::FFMA_RR] = {Type::Ffma, "ffma_rr"};
|
||||
info_table[Id::FADD_R] = {Type::Arithmetic, "fadd_r"};
|
||||
info_table[Id::FADD_C] = {Type::Arithmetic, "fadd_c"};
|
||||
info_table[Id::FADD_IMM] = {Type::Arithmetic, "fadd_imm"};
|
||||
info_table[Id::FMUL_R] = {Type::Arithmetic, "fmul_r"};
|
||||
info_table[Id::FMUL_C] = {Type::Arithmetic, "fmul_c"};
|
||||
info_table[Id::FMUL_IMM] = {Type::Arithmetic, "fmul_imm"};
|
||||
info_table[Id::FMUL32_IMM] = {Type::Arithmetic, "fmul32_imm"};
|
||||
info_table[Id::FSETP_C] = {Type::Arithmetic, "fsetp_c"};
|
||||
info_table[Id::FSETP_R] = {Type::Arithmetic, "fsetp_r"};
|
||||
info_table[Id::EXIT] = {Type::Trivial, "exit"};
|
||||
info_table[Id::IPA] = {Type::Trivial, "ipa"};
|
||||
info_table[Id::KIL] = {Type::Flow, "kil"};
|
||||
return info_table;
|
||||
}
|
||||
|
||||
BitField<57, 7, Id> op1;
|
||||
BitField<56, 8, Id> op2;
|
||||
BitField<55, 9, Id> op3;
|
||||
BitField<52, 12, Id> op4;
|
||||
BitField<51, 13, Id> op5;
|
||||
u64 value{};
|
||||
};
|
||||
static_assert(sizeof(OpCode) == 0x8, "Incorrect structure size");
|
||||
|
||||
} // namespace Shader
|
||||
} // namespace Tegra
|
||||
|
||||
namespace std {
|
||||
|
||||
// TODO(bunne): The below is forbidden by the C++ standard, but works fine. See #330.
|
||||
// TODO(bunnei): The below is forbidden by the C++ standard, but works fine. See #330.
|
||||
template <>
|
||||
struct make_unsigned<Tegra::Shader::Attribute> {
|
||||
using type = Tegra::Shader::Attribute;
|
||||
@@ -271,11 +111,6 @@ struct make_unsigned<Tegra::Shader::Register> {
|
||||
using type = Tegra::Shader::Register;
|
||||
};
|
||||
|
||||
template <>
|
||||
struct make_unsigned<Tegra::Shader::OpCode> {
|
||||
using type = Tegra::Shader::OpCode;
|
||||
};
|
||||
|
||||
} // namespace std
|
||||
|
||||
namespace Tegra {
|
||||
@@ -283,7 +118,23 @@ namespace Shader {
|
||||
|
||||
enum class Pred : u64 {
|
||||
UnusedIndex = 0x7,
|
||||
NeverExecute = 0xf,
|
||||
NeverExecute = 0xF,
|
||||
};
|
||||
|
||||
enum class PredCondition : u64 {
|
||||
LessThan = 1,
|
||||
Equal = 2,
|
||||
LessEqual = 3,
|
||||
GreaterThan = 4,
|
||||
NotEqual = 5,
|
||||
GreaterEqual = 6,
|
||||
// TODO(Subv): Other condition types
|
||||
};
|
||||
|
||||
enum class PredOperation : u64 {
|
||||
And = 0,
|
||||
Or = 1,
|
||||
Xor = 2,
|
||||
};
|
||||
|
||||
enum class SubOp : u64 {
|
||||
@@ -298,18 +149,24 @@ enum class SubOp : u64 {
|
||||
|
||||
union Instruction {
|
||||
Instruction& operator=(const Instruction& instr) {
|
||||
hex = instr.hex;
|
||||
value = instr.value;
|
||||
return *this;
|
||||
}
|
||||
|
||||
OpCode opcode;
|
||||
constexpr Instruction(u64 value) : value{value} {}
|
||||
|
||||
BitField<0, 8, Register> gpr0;
|
||||
BitField<8, 8, Register> gpr8;
|
||||
BitField<16, 4, Pred> pred;
|
||||
union {
|
||||
BitField<16, 4, Pred> full_pred;
|
||||
BitField<16, 3, u64> pred_index;
|
||||
} pred;
|
||||
BitField<19, 1, u64> negate_pred;
|
||||
BitField<20, 8, Register> gpr20;
|
||||
BitField<20, 7, SubOp> sub_op;
|
||||
BitField<28, 8, Register> gpr28;
|
||||
BitField<39, 8, Register> gpr39;
|
||||
BitField<48, 16, u64> opcode;
|
||||
|
||||
union {
|
||||
BitField<20, 19, u64> imm20_19;
|
||||
@@ -343,6 +200,20 @@ union Instruction {
|
||||
BitField<49, 1, u64> negate_c;
|
||||
} ffma;
|
||||
|
||||
union {
|
||||
BitField<0, 3, u64> pred0;
|
||||
BitField<3, 3, u64> pred3;
|
||||
BitField<7, 1, u64> abs_a;
|
||||
BitField<39, 3, u64> pred39;
|
||||
BitField<42, 1, u64> neg_pred;
|
||||
BitField<43, 1, u64> neg_a;
|
||||
BitField<44, 1, u64> abs_b;
|
||||
BitField<45, 2, PredOperation> op;
|
||||
BitField<47, 1, u64> ftz;
|
||||
BitField<48, 4, PredCondition> cond;
|
||||
BitField<56, 1, u64> neg_b;
|
||||
} fsetp;
|
||||
|
||||
BitField<61, 1, u64> is_b_imm;
|
||||
BitField<60, 1, u64> is_b_gpr;
|
||||
BitField<59, 1, u64> is_c_gpr;
|
||||
@@ -351,11 +222,218 @@ union Instruction {
|
||||
Uniform uniform;
|
||||
Sampler sampler;
|
||||
|
||||
u64 hex;
|
||||
u64 value;
|
||||
};
|
||||
static_assert(sizeof(Instruction) == 0x8, "Incorrect structure size");
|
||||
static_assert(std::is_standard_layout<Instruction>::value,
|
||||
"Structure does not have standard layout");
|
||||
|
||||
class OpCode {
|
||||
public:
|
||||
enum class Id {
|
||||
KIL,
|
||||
LD_A,
|
||||
ST_A,
|
||||
TEXQ, // Texture Query
|
||||
TEXS, // Texture Fetch with scalar/non-vec4 source/destinations
|
||||
TLDS, // Texture Load with scalar/non-vec4 source/destinations
|
||||
EXIT,
|
||||
IPA,
|
||||
FFMA_IMM, // Fused Multiply and Add
|
||||
FFMA_CR,
|
||||
FFMA_RC,
|
||||
FFMA_RR,
|
||||
FADD_C,
|
||||
FADD_R,
|
||||
FADD_IMM,
|
||||
FMUL_C,
|
||||
FMUL_R,
|
||||
FMUL_IMM,
|
||||
FMUL32_IMM,
|
||||
MUFU, // Multi-Function Operator
|
||||
RRO, // Range Reduction Operator
|
||||
F2F_C,
|
||||
F2F_R,
|
||||
F2F_IMM,
|
||||
F2I_C,
|
||||
F2I_R,
|
||||
F2I_IMM,
|
||||
I2F_C,
|
||||
I2F_R,
|
||||
I2F_IMM,
|
||||
LOP32I,
|
||||
MOV_C,
|
||||
MOV_R,
|
||||
MOV_IMM,
|
||||
MOV32I,
|
||||
SHR_C,
|
||||
SHR_R,
|
||||
SHR_IMM,
|
||||
FSETP_C, // Set Predicate
|
||||
FSETP_R,
|
||||
FSETP_IMM,
|
||||
ISETP_C,
|
||||
ISETP_IMM,
|
||||
ISETP_R,
|
||||
};
|
||||
|
||||
enum class Type {
|
||||
Trivial,
|
||||
Arithmetic,
|
||||
Ffma,
|
||||
Flow,
|
||||
Memory,
|
||||
FloatPredicate,
|
||||
IntegerPredicate,
|
||||
Unknown,
|
||||
};
|
||||
|
||||
class Matcher {
|
||||
public:
|
||||
Matcher(const char* const name, u16 mask, u16 expected, OpCode::Id id, OpCode::Type type)
|
||||
: name{name}, mask{mask}, expected{expected}, id{id}, type{type} {}
|
||||
|
||||
const char* GetName() const {
|
||||
return name;
|
||||
}
|
||||
|
||||
u16 GetMask() const {
|
||||
return mask;
|
||||
}
|
||||
|
||||
Id GetId() const {
|
||||
return id;
|
||||
}
|
||||
|
||||
Type GetType() const {
|
||||
return type;
|
||||
}
|
||||
|
||||
/**
|
||||
* Tests to see if the given instruction is the instruction this matcher represents.
|
||||
* @param instruction The instruction to test
|
||||
* @returns true if the given instruction matches.
|
||||
*/
|
||||
bool Matches(u16 instruction) const {
|
||||
return (instruction & mask) == expected;
|
||||
}
|
||||
|
||||
private:
|
||||
const char* name;
|
||||
u16 mask;
|
||||
u16 expected;
|
||||
Id id;
|
||||
Type type;
|
||||
};
|
||||
|
||||
static boost::optional<const Matcher&> Decode(Instruction instr) {
|
||||
static const auto table{GetDecodeTable()};
|
||||
|
||||
const auto matches_instruction = [instr](const auto& matcher) {
|
||||
return matcher.Matches(static_cast<u16>(instr.opcode));
|
||||
};
|
||||
|
||||
auto iter = std::find_if(table.begin(), table.end(), matches_instruction);
|
||||
return iter != table.end() ? boost::optional<const Matcher&>(*iter) : boost::none;
|
||||
}
|
||||
|
||||
private:
|
||||
struct Detail {
|
||||
private:
|
||||
static constexpr size_t opcode_bitsize = 16;
|
||||
|
||||
/**
|
||||
* Generates the mask and the expected value after masking from a given bitstring.
|
||||
* A '0' in a bitstring indicates that a zero must be present at that bit position.
|
||||
* A '1' in a bitstring indicates that a one must be present at that bit position.
|
||||
*/
|
||||
static auto GetMaskAndExpect(const char* const bitstring) {
|
||||
u16 mask = 0, expect = 0;
|
||||
for (size_t i = 0; i < opcode_bitsize; i++) {
|
||||
const size_t bit_position = opcode_bitsize - i - 1;
|
||||
switch (bitstring[i]) {
|
||||
case '0':
|
||||
mask |= 1 << bit_position;
|
||||
break;
|
||||
case '1':
|
||||
expect |= 1 << bit_position;
|
||||
mask |= 1 << bit_position;
|
||||
break;
|
||||
default:
|
||||
// Ignore
|
||||
break;
|
||||
}
|
||||
}
|
||||
return std::make_tuple(mask, expect);
|
||||
}
|
||||
|
||||
public:
|
||||
/// Creates a matcher that can match and parse instructions based on bitstring.
|
||||
static auto GetMatcher(const char* const bitstring, OpCode::Id op, OpCode::Type type,
|
||||
const char* const name) {
|
||||
const auto mask_expect = GetMaskAndExpect(bitstring);
|
||||
return Matcher(name, std::get<0>(mask_expect), std::get<1>(mask_expect), op, type);
|
||||
}
|
||||
};
|
||||
|
||||
static std::vector<Matcher> GetDecodeTable() {
|
||||
std::vector<Matcher> table = {
|
||||
#define INST(bitstring, op, type, name) Detail::GetMatcher(bitstring, op, type, name)
|
||||
INST("111000110011----", Id::KIL, Type::Flow, "KIL"),
|
||||
INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"),
|
||||
INST("1110111111110---", Id::ST_A, Type::Memory, "ST_A"),
|
||||
INST("1101111101001---", Id::TEXQ, Type::Memory, "TEXQ"),
|
||||
INST("1101100---------", Id::TEXS, Type::Memory, "TEXS"),
|
||||
INST("1101101---------", Id::TLDS, Type::Memory, "TLDS"),
|
||||
INST("111000110000----", Id::EXIT, Type::Trivial, "EXIT"),
|
||||
INST("11100000--------", Id::IPA, Type::Trivial, "IPA"),
|
||||
INST("001100101-------", Id::FFMA_IMM, Type::Ffma, "FFMA_IMM"),
|
||||
INST("010010011-------", Id::FFMA_CR, Type::Ffma, "FFMA_CR"),
|
||||
INST("010100011-------", Id::FFMA_RC, Type::Ffma, "FFMA_RC"),
|
||||
INST("010110011-------", Id::FFMA_RR, Type::Ffma, "FFMA_RR"),
|
||||
INST("0100110001011---", Id::FADD_C, Type::Arithmetic, "FADD_C"),
|
||||
INST("0101110001011---", Id::FADD_R, Type::Arithmetic, "FADD_R"),
|
||||
INST("0011100-01011---", Id::FADD_IMM, Type::Arithmetic, "FADD_IMM"),
|
||||
INST("0100110001101---", Id::FMUL_C, Type::Arithmetic, "FMUL_C"),
|
||||
INST("0101110001101---", Id::FMUL_R, Type::Arithmetic, "FMUL_R"),
|
||||
INST("0011100-01101---", Id::FMUL_IMM, Type::Arithmetic, "FMUL_IMM"),
|
||||
INST("00011110--------", Id::FMUL32_IMM, Type::Arithmetic, "FMUL32_IMM"),
|
||||
INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"),
|
||||
INST("0101110010010---", Id::RRO, Type::Arithmetic, "RRO"),
|
||||
INST("0100110010101---", Id::F2F_C, Type::Arithmetic, "F2F_C"),
|
||||
INST("0101110010101---", Id::F2F_R, Type::Arithmetic, "F2F_R"),
|
||||
INST("0011100-10101---", Id::F2F_IMM, Type::Arithmetic, "F2F_IMM"),
|
||||
INST("0100110010110---", Id::F2I_C, Type::Arithmetic, "F2I_C"),
|
||||
INST("0101110010110---", Id::F2I_R, Type::Arithmetic, "F2I_R"),
|
||||
INST("0011100-10110---", Id::F2I_IMM, Type::Arithmetic, "F2I_IMM"),
|
||||
INST("0100110010111---", Id::I2F_C, Type::Arithmetic, "I2F_C"),
|
||||
INST("0101110010111---", Id::I2F_R, Type::Arithmetic, "I2F_R"),
|
||||
INST("0011100-10111---", Id::I2F_IMM, Type::Arithmetic, "I2F_IMM"),
|
||||
INST("000001----------", Id::LOP32I, Type::Arithmetic, "LOP32I"),
|
||||
INST("0100110010011---", Id::MOV_C, Type::Arithmetic, "MOV_C"),
|
||||
INST("0101110010011---", Id::MOV_R, Type::Arithmetic, "MOV_R"),
|
||||
INST("0011100-10011---", Id::MOV_IMM, Type::Arithmetic, "MOV_IMM"),
|
||||
INST("000000010000----", Id::MOV32I, Type::Arithmetic, "MOV32I"),
|
||||
INST("0100110000101---", Id::SHR_C, Type::Arithmetic, "SHR_C"),
|
||||
INST("0101110000101---", Id::SHR_R, Type::Arithmetic, "SHR_R"),
|
||||
INST("0011100-00101---", Id::SHR_IMM, Type::Arithmetic, "SHR_IMM"),
|
||||
INST("010010111011----", Id::FSETP_C, Type::FloatPredicate, "FSETP_C"),
|
||||
INST("010110111011----", Id::FSETP_R, Type::FloatPredicate, "FSETP_R"),
|
||||
INST("0011011-1011----", Id::FSETP_IMM, Type::FloatPredicate, "FSETP_IMM"),
|
||||
INST("010010110110----", Id::ISETP_C, Type::IntegerPredicate, "ISETP_C"),
|
||||
INST("010110110110----", Id::ISETP_R, Type::IntegerPredicate, "ISETP_R"),
|
||||
INST("0011011-0110----", Id::ISETP_IMM, Type::IntegerPredicate, "ISETP_IMM"),
|
||||
};
|
||||
#undef INST
|
||||
std::stable_sort(table.begin(), table.end(), [](const auto& a, const auto& b) {
|
||||
// If a matcher has more bits in its mask it is more specific, so it
|
||||
// should come first.
|
||||
return std::bitset<16>(a.GetMask()).count() > std::bitset<16>(b.GetMask()).count();
|
||||
});
|
||||
|
||||
return table;
|
||||
}
|
||||
};
|
||||
|
||||
} // namespace Shader
|
||||
} // namespace Tegra
|
||||
|
||||
@@ -14,6 +14,7 @@
|
||||
#include "common/math_util.h"
|
||||
#include "common/microprofile.h"
|
||||
#include "common/scope_exit.h"
|
||||
#include "common/vector_math.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/kernel/process.h"
|
||||
#include "core/settings.h"
|
||||
|
||||
@@ -6,10 +6,15 @@
|
||||
|
||||
#include <array>
|
||||
#include <cstddef>
|
||||
#include <cstring>
|
||||
#include <memory>
|
||||
#include <unordered_map>
|
||||
#include <vector>
|
||||
#include <glad/glad.h>
|
||||
#include "common/bit_field.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/hash.h"
|
||||
#include "common/vector_math.h"
|
||||
#include "video_core/engines/maxwell_3d.h"
|
||||
#include "video_core/rasterizer_interface.h"
|
||||
#include "video_core/renderer_opengl/gl_rasterizer_cache.h"
|
||||
|
||||
@@ -7,6 +7,7 @@
|
||||
#include <cstring>
|
||||
#include <iterator>
|
||||
#include <memory>
|
||||
#include <unordered_set>
|
||||
#include <utility>
|
||||
#include <vector>
|
||||
#include <boost/optional.hpp>
|
||||
@@ -19,6 +20,7 @@
|
||||
#include "common/math_util.h"
|
||||
#include "common/microprofile.h"
|
||||
#include "common/scope_exit.h"
|
||||
#include "common/vector_math.h"
|
||||
#include "core/core.h"
|
||||
#include "core/frontend/emu_window.h"
|
||||
#include "core/hle/kernel/process.h"
|
||||
@@ -670,7 +672,8 @@ void CachedSurface::DownloadGLTexture(const MathUtil::Rectangle<u32>& rect, GLui
|
||||
glPixelStorei(GL_PACK_ROW_LENGTH, 0);
|
||||
}
|
||||
|
||||
enum MatchFlags {
|
||||
enum class MatchFlags {
|
||||
None = 0,
|
||||
Invalid = 1, // Flag that can be applied to other match types, invalid matches require
|
||||
// validation before they can be used
|
||||
Exact = 1 << 1, // Surfaces perfectly match
|
||||
@@ -684,6 +687,10 @@ constexpr MatchFlags operator|(MatchFlags lhs, MatchFlags rhs) {
|
||||
return static_cast<MatchFlags>(static_cast<int>(lhs) | static_cast<int>(rhs));
|
||||
}
|
||||
|
||||
constexpr MatchFlags operator&(MatchFlags lhs, MatchFlags rhs) {
|
||||
return static_cast<MatchFlags>(static_cast<int>(lhs) & static_cast<int>(rhs));
|
||||
}
|
||||
|
||||
/// Get the best surface match (and its match type) for the given flags
|
||||
template <MatchFlags find_flags>
|
||||
Surface FindMatch(const SurfaceCache& surface_cache, const SurfaceParams& params,
|
||||
@@ -701,15 +708,15 @@ Surface FindMatch(const SurfaceCache& surface_cache, const SurfaceParams& params
|
||||
: (params.res_scale <= surface->res_scale);
|
||||
// validity will be checked in GetCopyableInterval
|
||||
bool is_valid =
|
||||
find_flags & MatchFlags::Copy
|
||||
(find_flags & MatchFlags::Copy) != MatchFlags::None
|
||||
? true
|
||||
: surface->IsRegionValid(validate_interval.value_or(params.GetInterval()));
|
||||
|
||||
if (!(find_flags & MatchFlags::Invalid) && !is_valid)
|
||||
if ((find_flags & MatchFlags::Invalid) == MatchFlags::None && !is_valid)
|
||||
continue;
|
||||
|
||||
auto IsMatch_Helper = [&](auto check_type, auto match_fn) {
|
||||
if (!(find_flags & check_type))
|
||||
if ((find_flags & check_type) == MatchFlags::None)
|
||||
return;
|
||||
|
||||
bool matched;
|
||||
|
||||
@@ -14,13 +14,13 @@ class OGLTexture : private NonCopyable {
|
||||
public:
|
||||
OGLTexture() = default;
|
||||
|
||||
OGLTexture(OGLTexture&& o) : handle(std::exchange(o.handle, 0)) {}
|
||||
OGLTexture(OGLTexture&& o) noexcept : handle(std::exchange(o.handle, 0)) {}
|
||||
|
||||
~OGLTexture() {
|
||||
Release();
|
||||
}
|
||||
|
||||
OGLTexture& operator=(OGLTexture&& o) {
|
||||
OGLTexture& operator=(OGLTexture&& o) noexcept {
|
||||
Release();
|
||||
handle = std::exchange(o.handle, 0);
|
||||
return *this;
|
||||
@@ -49,13 +49,13 @@ class OGLSampler : private NonCopyable {
|
||||
public:
|
||||
OGLSampler() = default;
|
||||
|
||||
OGLSampler(OGLSampler&& o) : handle(std::exchange(o.handle, 0)) {}
|
||||
OGLSampler(OGLSampler&& o) noexcept : handle(std::exchange(o.handle, 0)) {}
|
||||
|
||||
~OGLSampler() {
|
||||
Release();
|
||||
}
|
||||
|
||||
OGLSampler& operator=(OGLSampler&& o) {
|
||||
OGLSampler& operator=(OGLSampler&& o) noexcept {
|
||||
Release();
|
||||
handle = std::exchange(o.handle, 0);
|
||||
return *this;
|
||||
@@ -84,13 +84,13 @@ class OGLShader : private NonCopyable {
|
||||
public:
|
||||
OGLShader() = default;
|
||||
|
||||
OGLShader(OGLShader&& o) : handle(std::exchange(o.handle, 0)) {}
|
||||
OGLShader(OGLShader&& o) noexcept : handle(std::exchange(o.handle, 0)) {}
|
||||
|
||||
~OGLShader() {
|
||||
Release();
|
||||
}
|
||||
|
||||
OGLShader& operator=(OGLShader&& o) {
|
||||
OGLShader& operator=(OGLShader&& o) noexcept {
|
||||
Release();
|
||||
handle = std::exchange(o.handle, 0);
|
||||
return *this;
|
||||
@@ -118,13 +118,13 @@ class OGLProgram : private NonCopyable {
|
||||
public:
|
||||
OGLProgram() = default;
|
||||
|
||||
OGLProgram(OGLProgram&& o) : handle(std::exchange(o.handle, 0)) {}
|
||||
OGLProgram(OGLProgram&& o) noexcept : handle(std::exchange(o.handle, 0)) {}
|
||||
|
||||
~OGLProgram() {
|
||||
Release();
|
||||
}
|
||||
|
||||
OGLProgram& operator=(OGLProgram&& o) {
|
||||
OGLProgram& operator=(OGLProgram&& o) noexcept {
|
||||
Release();
|
||||
handle = std::exchange(o.handle, 0);
|
||||
return *this;
|
||||
@@ -165,13 +165,12 @@ public:
|
||||
class OGLPipeline : private NonCopyable {
|
||||
public:
|
||||
OGLPipeline() = default;
|
||||
OGLPipeline(OGLPipeline&& o) {
|
||||
handle = std::exchange<GLuint>(o.handle, 0);
|
||||
}
|
||||
OGLPipeline(OGLPipeline&& o) noexcept : handle{std::exchange<GLuint>(o.handle, 0)} {}
|
||||
|
||||
~OGLPipeline() {
|
||||
Release();
|
||||
}
|
||||
OGLPipeline& operator=(OGLPipeline&& o) {
|
||||
OGLPipeline& operator=(OGLPipeline&& o) noexcept {
|
||||
handle = std::exchange<GLuint>(o.handle, 0);
|
||||
return *this;
|
||||
}
|
||||
@@ -199,13 +198,13 @@ class OGLBuffer : private NonCopyable {
|
||||
public:
|
||||
OGLBuffer() = default;
|
||||
|
||||
OGLBuffer(OGLBuffer&& o) : handle(std::exchange(o.handle, 0)) {}
|
||||
OGLBuffer(OGLBuffer&& o) noexcept : handle(std::exchange(o.handle, 0)) {}
|
||||
|
||||
~OGLBuffer() {
|
||||
Release();
|
||||
}
|
||||
|
||||
OGLBuffer& operator=(OGLBuffer&& o) {
|
||||
OGLBuffer& operator=(OGLBuffer&& o) noexcept {
|
||||
Release();
|
||||
handle = std::exchange(o.handle, 0);
|
||||
return *this;
|
||||
@@ -234,12 +233,12 @@ class OGLSync : private NonCopyable {
|
||||
public:
|
||||
OGLSync() = default;
|
||||
|
||||
OGLSync(OGLSync&& o) : handle(std::exchange(o.handle, nullptr)) {}
|
||||
OGLSync(OGLSync&& o) noexcept : handle(std::exchange(o.handle, nullptr)) {}
|
||||
|
||||
~OGLSync() {
|
||||
Release();
|
||||
}
|
||||
OGLSync& operator=(OGLSync&& o) {
|
||||
OGLSync& operator=(OGLSync&& o) noexcept {
|
||||
Release();
|
||||
handle = std::exchange(o.handle, nullptr);
|
||||
return *this;
|
||||
@@ -267,13 +266,13 @@ class OGLVertexArray : private NonCopyable {
|
||||
public:
|
||||
OGLVertexArray() = default;
|
||||
|
||||
OGLVertexArray(OGLVertexArray&& o) : handle(std::exchange(o.handle, 0)) {}
|
||||
OGLVertexArray(OGLVertexArray&& o) noexcept : handle(std::exchange(o.handle, 0)) {}
|
||||
|
||||
~OGLVertexArray() {
|
||||
Release();
|
||||
}
|
||||
|
||||
OGLVertexArray& operator=(OGLVertexArray&& o) {
|
||||
OGLVertexArray& operator=(OGLVertexArray&& o) noexcept {
|
||||
Release();
|
||||
handle = std::exchange(o.handle, 0);
|
||||
return *this;
|
||||
@@ -302,13 +301,13 @@ class OGLFramebuffer : private NonCopyable {
|
||||
public:
|
||||
OGLFramebuffer() = default;
|
||||
|
||||
OGLFramebuffer(OGLFramebuffer&& o) : handle(std::exchange(o.handle, 0)) {}
|
||||
OGLFramebuffer(OGLFramebuffer&& o) noexcept : handle(std::exchange(o.handle, 0)) {}
|
||||
|
||||
~OGLFramebuffer() {
|
||||
Release();
|
||||
}
|
||||
|
||||
OGLFramebuffer& operator=(OGLFramebuffer&& o) {
|
||||
OGLFramebuffer& operator=(OGLFramebuffer&& o) noexcept {
|
||||
Release();
|
||||
handle = std::exchange(o.handle, 0);
|
||||
return *this;
|
||||
|
||||
@@ -97,11 +97,12 @@ private:
|
||||
return exit_method;
|
||||
|
||||
for (u32 offset = begin; offset != end && offset != PROGRAM_END; ++offset) {
|
||||
const Instruction instr = {program_code[offset]};
|
||||
switch (instr.opcode.EffectiveOpCode()) {
|
||||
case OpCode::Id::EXIT: {
|
||||
return exit_method = ExitMethod::AlwaysEnd;
|
||||
}
|
||||
if (const auto opcode = OpCode::Decode({program_code[offset]})) {
|
||||
switch (opcode->GetId()) {
|
||||
case OpCode::Id::EXIT: {
|
||||
return exit_method = ExitMethod::AlwaysEnd;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return exit_method = ExitMethod::AlwaysReturn;
|
||||
@@ -220,6 +221,8 @@ private:
|
||||
|
||||
/// Generates code representing a temporary (GPR) register.
|
||||
std::string GetRegister(const Register& reg, unsigned elem = 0) {
|
||||
if (reg == Register::ZeroIndex)
|
||||
return "0";
|
||||
if (stage == Maxwell3D::Regs::ShaderStage::Fragment && reg < 4) {
|
||||
// GPRs 0-3 are output color for the fragment shader
|
||||
return std::string{"color."} + "rgba"[(reg + elem) & 3];
|
||||
@@ -276,6 +279,52 @@ private:
|
||||
shader.AddLine(dest + " = " + src + ";");
|
||||
}
|
||||
|
||||
/*
|
||||
* Writes code that assigns a predicate boolean variable.
|
||||
* @param pred The id of the predicate to write to.
|
||||
* @param value The expression value to assign to the predicate.
|
||||
*/
|
||||
void SetPredicate(u64 pred, const std::string& value) {
|
||||
using Tegra::Shader::Pred;
|
||||
// Can't assign to the constant predicate.
|
||||
ASSERT(pred != static_cast<u64>(Pred::UnusedIndex));
|
||||
|
||||
std::string variable = 'p' + std::to_string(pred);
|
||||
shader.AddLine(variable + " = " + value + ';');
|
||||
declr_predicates.insert(std::move(variable));
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns the condition to use in the 'if' for a predicated instruction.
|
||||
* @param instr Instruction to generate the if condition for.
|
||||
* @returns string containing the predicate condition.
|
||||
*/
|
||||
std::string GetPredicateCondition(Instruction instr) const {
|
||||
using Tegra::Shader::Pred;
|
||||
ASSERT(instr.pred.pred_index != static_cast<u64>(Pred::UnusedIndex));
|
||||
|
||||
std::string variable =
|
||||
'p' + std::to_string(static_cast<u64>(instr.pred.pred_index.Value()));
|
||||
|
||||
if (instr.negate_pred) {
|
||||
return "!(" + variable + ')';
|
||||
}
|
||||
|
||||
return variable;
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns whether the instruction at the specified offset is a 'sched' instruction.
|
||||
* Sched instructions always appear before a sequence of 3 instructions.
|
||||
*/
|
||||
bool IsSchedInstruction(u32 offset) const {
|
||||
// sched instructions appear once every 4 instructions.
|
||||
static constexpr size_t SchedPeriod = 4;
|
||||
u32 absolute_offset = offset - main_offset;
|
||||
|
||||
return (absolute_offset % SchedPeriod) == 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* Compiles a single instruction from Tegra to GLSL.
|
||||
* @param offset the offset of the Tegra shader instruction.
|
||||
@@ -283,11 +332,33 @@ private:
|
||||
* + 1. If the current instruction always terminates the program, returns PROGRAM_END.
|
||||
*/
|
||||
u32 CompileInstr(u32 offset) {
|
||||
// Ignore sched instructions when generating code.
|
||||
if (IsSchedInstruction(offset)) {
|
||||
return offset + 1;
|
||||
}
|
||||
|
||||
const Instruction instr = {program_code[offset]};
|
||||
const auto opcode = OpCode::Decode(instr);
|
||||
|
||||
shader.AddLine("// " + std::to_string(offset) + ": " + OpCode::GetInfo(instr.opcode).name);
|
||||
// Decoding failure
|
||||
if (!opcode) {
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled instruction: {0:x}", instr.value);
|
||||
UNREACHABLE();
|
||||
}
|
||||
|
||||
switch (OpCode::GetInfo(instr.opcode).type) {
|
||||
shader.AddLine("// " + std::to_string(offset) + ": " + opcode->GetName());
|
||||
|
||||
using Tegra::Shader::Pred;
|
||||
ASSERT_MSG(instr.pred.full_pred != Pred::NeverExecute,
|
||||
"NeverExecute predicate not implemented");
|
||||
|
||||
if (instr.pred.pred_index != static_cast<u64>(Pred::UnusedIndex)) {
|
||||
shader.AddLine("if (" + GetPredicateCondition(instr) + ')');
|
||||
shader.AddLine('{');
|
||||
++shader.scope;
|
||||
}
|
||||
|
||||
switch (opcode->GetType()) {
|
||||
case OpCode::Type::Arithmetic: {
|
||||
std::string dest = GetRegister(instr.gpr0);
|
||||
std::string op_a = instr.alu.negate_a ? "-" : "";
|
||||
@@ -312,7 +383,7 @@ private:
|
||||
op_b = "abs(" + op_b + ")";
|
||||
}
|
||||
|
||||
switch (instr.opcode.EffectiveOpCode()) {
|
||||
switch (opcode->GetId()) {
|
||||
case OpCode::Id::FMUL_C:
|
||||
case OpCode::Id::FMUL_R:
|
||||
case OpCode::Id::FMUL_IMM: {
|
||||
@@ -354,16 +425,18 @@ private:
|
||||
SetDest(0, dest, "min(" + op_a + "," + op_b + ")", 1, 1, instr.alu.abs_d);
|
||||
break;
|
||||
default:
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled MUFU sub op: {}",
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled MUFU sub op: {0:x}",
|
||||
static_cast<unsigned>(instr.sub_op.Value()));
|
||||
UNREACHABLE();
|
||||
}
|
||||
break;
|
||||
}
|
||||
case OpCode::Id::RRO: {
|
||||
NGLOG_DEBUG(HW_GPU, "Skipping RRO instruction");
|
||||
break;
|
||||
}
|
||||
default: {
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled arithmetic instruction: {} ({}): {}",
|
||||
static_cast<unsigned>(instr.opcode.EffectiveOpCode()),
|
||||
OpCode::GetInfo(instr.opcode).name, instr.hex);
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled arithmetic instruction: {}", opcode->GetName());
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
@@ -375,7 +448,7 @@ private:
|
||||
std::string op_b = instr.ffma.negate_b ? "-" : "";
|
||||
std::string op_c = instr.ffma.negate_c ? "-" : "";
|
||||
|
||||
switch (instr.opcode.EffectiveOpCode()) {
|
||||
switch (opcode->GetId()) {
|
||||
case OpCode::Id::FFMA_CR: {
|
||||
op_b += GetUniform(instr.uniform);
|
||||
op_c += GetRegister(instr.gpr39);
|
||||
@@ -397,9 +470,7 @@ private:
|
||||
break;
|
||||
}
|
||||
default: {
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled FFMA instruction: {} ({}): {}",
|
||||
static_cast<unsigned>(instr.opcode.EffectiveOpCode()),
|
||||
OpCode::GetInfo(instr.opcode).name, instr.hex);
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled FFMA instruction: {}", opcode->GetName());
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
@@ -411,7 +482,7 @@ private:
|
||||
std::string gpr0 = GetRegister(instr.gpr0);
|
||||
const Attribute::Index attribute = instr.attribute.fmt20.index;
|
||||
|
||||
switch (instr.opcode.EffectiveOpCode()) {
|
||||
switch (opcode->GetId()) {
|
||||
case OpCode::Id::LD_A: {
|
||||
ASSERT_MSG(instr.attribute.fmt20.size == 0, "untested");
|
||||
SetDest(instr.attribute.fmt20.element, gpr0, GetInputAttribute(attribute), 1, 4);
|
||||
@@ -442,22 +513,76 @@ private:
|
||||
break;
|
||||
}
|
||||
default: {
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled memory instruction: {} ({}): {}",
|
||||
static_cast<unsigned>(instr.opcode.EffectiveOpCode()),
|
||||
OpCode::GetInfo(instr.opcode).name, instr.hex);
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled memory instruction: {}", opcode->GetName());
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
case OpCode::Type::FloatPredicate: {
|
||||
std::string op_a = instr.fsetp.neg_a ? "-" : "";
|
||||
op_a += GetRegister(instr.gpr8);
|
||||
|
||||
if (instr.fsetp.abs_a) {
|
||||
op_a = "abs(" + op_a + ')';
|
||||
}
|
||||
|
||||
std::string op_b{};
|
||||
|
||||
if (instr.is_b_imm) {
|
||||
if (instr.fsetp.neg_b) {
|
||||
// Only the immediate version of fsetp has a neg_b bit.
|
||||
op_b += '-';
|
||||
}
|
||||
op_b += '(' + GetImmediate19(instr) + ')';
|
||||
} else {
|
||||
if (instr.is_b_gpr) {
|
||||
op_b += GetRegister(instr.gpr20);
|
||||
} else {
|
||||
op_b += GetUniform(instr.uniform);
|
||||
}
|
||||
}
|
||||
|
||||
if (instr.fsetp.abs_b) {
|
||||
op_b = "abs(" + op_b + ')';
|
||||
}
|
||||
|
||||
using Tegra::Shader::Pred;
|
||||
ASSERT_MSG(instr.fsetp.pred0 == static_cast<u64>(Pred::UnusedIndex) &&
|
||||
instr.fsetp.pred39 == static_cast<u64>(Pred::UnusedIndex),
|
||||
"Compound predicates are not implemented");
|
||||
|
||||
// We can't use the constant predicate as destination.
|
||||
ASSERT(instr.fsetp.pred3 != static_cast<u64>(Pred::UnusedIndex));
|
||||
|
||||
using Tegra::Shader::PredCondition;
|
||||
switch (instr.fsetp.cond) {
|
||||
case PredCondition::LessThan:
|
||||
SetPredicate(instr.fsetp.pred3, '(' + op_a + ") < (" + op_b + ')');
|
||||
break;
|
||||
case PredCondition::Equal:
|
||||
SetPredicate(instr.fsetp.pred3, '(' + op_a + ") == (" + op_b + ')');
|
||||
break;
|
||||
default:
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled predicate condition: {} (a: {}, b: {})",
|
||||
static_cast<unsigned>(instr.fsetp.cond.Value()), op_a, op_b);
|
||||
UNREACHABLE();
|
||||
}
|
||||
break;
|
||||
}
|
||||
default: {
|
||||
switch (instr.opcode.EffectiveOpCode()) {
|
||||
switch (opcode->GetId()) {
|
||||
case OpCode::Id::EXIT: {
|
||||
ASSERT_MSG(instr.pred.pred_index == static_cast<u64>(Pred::UnusedIndex),
|
||||
"Predicated exits not implemented");
|
||||
shader.AddLine("return true;");
|
||||
offset = PROGRAM_END - 1;
|
||||
break;
|
||||
}
|
||||
case OpCode::Id::KIL: {
|
||||
shader.AddLine("discard;");
|
||||
break;
|
||||
}
|
||||
case OpCode::Id::IPA: {
|
||||
const auto& attribute = instr.attribute.fmt28;
|
||||
std::string dest = GetRegister(instr.gpr0);
|
||||
@@ -465,9 +590,7 @@ private:
|
||||
break;
|
||||
}
|
||||
default: {
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled instruction: {} ({}): {}",
|
||||
static_cast<unsigned>(instr.opcode.EffectiveOpCode()),
|
||||
OpCode::GetInfo(instr.opcode).name, instr.hex);
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled instruction: {}", opcode->GetName());
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
@@ -476,6 +599,12 @@ private:
|
||||
}
|
||||
}
|
||||
|
||||
// Close the predicate condition scope.
|
||||
if (instr.pred.pred_index != static_cast<u64>(Pred::UnusedIndex)) {
|
||||
--shader.scope;
|
||||
shader.AddLine('}');
|
||||
}
|
||||
|
||||
return offset + 1;
|
||||
}
|
||||
|
||||
@@ -605,6 +734,12 @@ private:
|
||||
declarations.AddNewLine();
|
||||
++const_buffer_layout;
|
||||
}
|
||||
|
||||
declarations.AddNewLine();
|
||||
for (const auto& pred : declr_predicates) {
|
||||
declarations.AddLine("bool " + pred + " = false;");
|
||||
}
|
||||
declarations.AddNewLine();
|
||||
}
|
||||
|
||||
private:
|
||||
@@ -618,6 +753,7 @@ private:
|
||||
|
||||
// Declarations
|
||||
std::set<std::string> declr_register;
|
||||
std::set<std::string> declr_predicates;
|
||||
std::set<Attribute::Index> declr_input_attribute;
|
||||
std::set<Attribute::Index> declr_output_attribute;
|
||||
std::array<ConstBufferEntry, Maxwell3D::Regs::MaxConstBuffers> declr_const_buffers;
|
||||
|
||||
@@ -9,10 +9,13 @@
|
||||
#include <memory>
|
||||
#include <glad/glad.h>
|
||||
#include "common/assert.h"
|
||||
#include "common/bit_field.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/core_timing.h"
|
||||
#include "core/frontend/emu_window.h"
|
||||
#include "core/hw/hw.h"
|
||||
#include "core/hw/lcd.h"
|
||||
#include "core/memory.h"
|
||||
#include "core/settings.h"
|
||||
#include "core/tracer/recorder.h"
|
||||
|
||||
Reference in New Issue
Block a user