shader_ir: Unify constant buffer offset values

Constant buffer values on the shader IR were using different offsets if
the access direct or indirect. cbuf34 has a non-multiplied offset while
cbuf36 does. On shader decoding this commit multiplies it by four on
cbuf34 queries.

src/core/hle/service/nvflinger/nvflinger.cpp

@@ -61,7 +61,7 @@ u64 NVFlinger::OpenDisplay(std::string_view name) {
 }
 
 u64 NVFlinger::CreateLayer(u64 display_id) {
-    auto& display = FindDisplay(display_id);
+    auto& display = GetDisplay(display_id);
 
     ASSERT_MSG(display.layers.empty(), "Only one layer is supported per display at the moment");
 
@@ -73,16 +73,16 @@ u64 NVFlinger::CreateLayer(u64 display_id) {
     return layer_id;
 }
 
-u32 NVFlinger::FindBufferQueueId(u64 display_id, u64 layer_id) const {
-    const auto& layer = FindLayer(display_id, layer_id);
+u32 NVFlinger::GetBufferQueueId(u64 display_id, u64 layer_id) {
+    const auto& layer = GetLayer(display_id, layer_id);
     return layer.buffer_queue->GetId();
 }
 
 Kernel::SharedPtr<Kernel::ReadableEvent> NVFlinger::GetVsyncEvent(u64 display_id) {
-    return FindDisplay(display_id).vsync_event.readable;
+    return GetDisplay(display_id).vsync_event.readable;
 }
 
-std::shared_ptr<BufferQueue> NVFlinger::FindBufferQueue(u32 id) const {
+std::shared_ptr<BufferQueue> NVFlinger::GetBufferQueue(u32 id) const {
     const auto itr = std::find_if(buffer_queues.begin(), buffer_queues.end(),
                                   [&](const auto& queue) { return queue->GetId() == id; });
 
@@ -90,7 +90,7 @@ std::shared_ptr<BufferQueue> NVFlinger::FindBufferQueue(u32 id) const {
     return *itr;
 }
 
-Display& NVFlinger::FindDisplay(u64 display_id) {
+Display& NVFlinger::GetDisplay(u64 display_id) {
     const auto itr = std::find_if(displays.begin(), displays.end(),
                                   [&](const Display& display) { return display.id == display_id; });
 
@@ -98,26 +98,8 @@ Display& NVFlinger::FindDisplay(u64 display_id) {
     return *itr;
 }
 
-const Display& NVFlinger::FindDisplay(u64 display_id) const {
-    const auto itr = std::find_if(displays.begin(), displays.end(),
-                                  [&](const Display& display) { return display.id == display_id; });
-
-    ASSERT(itr != displays.end());
-    return *itr;
-}
-
-Layer& NVFlinger::FindLayer(u64 display_id, u64 layer_id) {
-    auto& display = FindDisplay(display_id);
-
-    const auto itr = std::find_if(display.layers.begin(), display.layers.end(),
-                                  [&](const Layer& layer) { return layer.id == layer_id; });
-
-    ASSERT(itr != display.layers.end());
-    return *itr;
-}
-
-const Layer& NVFlinger::FindLayer(u64 display_id, u64 layer_id) const {
-    const auto& display = FindDisplay(display_id);
+Layer& NVFlinger::GetLayer(u64 display_id, u64 layer_id) {
+    auto& display = GetDisplay(display_id);
 
     const auto itr = std::find_if(display.layers.begin(), display.layers.end(),
                                   [&](const Layer& layer) { return layer.id == layer_id; });

src/core/hle/service/nvflinger/nvflinger.h

@@ -57,37 +57,31 @@ public:
     /// Sets the NVDrv module instance to use to send buffers to the GPU.
     void SetNVDrvInstance(std::shared_ptr<Nvidia::Module> instance);
 
-    /// Opens the specified display and returns the ID.
+    /// Opens the specified display and returns the id.
     u64 OpenDisplay(std::string_view name);
 
-    /// Creates a layer on the specified display and returns the layer ID.
+    /// Creates a layer on the specified display and returns the layer id.
     u64 CreateLayer(u64 display_id);
 
-    /// Finds the buffer queue ID of the specified layer in the specified display.
-    u32 FindBufferQueueId(u64 display_id, u64 layer_id) const;
+    /// Gets the buffer queue id of the specified layer in the specified display.
+    u32 GetBufferQueueId(u64 display_id, u64 layer_id);
 
     /// Gets the vsync event for the specified display.
     Kernel::SharedPtr<Kernel::ReadableEvent> GetVsyncEvent(u64 display_id);
 
-    /// Obtains a buffer queue identified by the ID.
-    std::shared_ptr<BufferQueue> FindBufferQueue(u32 id) const;
+    /// Obtains a buffer queue identified by the id.
+    std::shared_ptr<BufferQueue> GetBufferQueue(u32 id) const;
 
     /// Performs a composition request to the emulated nvidia GPU and triggers the vsync events when
     /// finished.
     void Compose();
 
 private:
-    /// Finds the display identified by the specified ID.
-    Display& FindDisplay(u64 display_id);
+    /// Returns the display identified by the specified id.
+    Display& GetDisplay(u64 display_id);
 
-    /// Finds the display identified by the specified ID.
-    const Display& FindDisplay(u64 display_id) const;
-
-    /// Finds the layer identified by the specified ID in the desired display.
-    Layer& FindLayer(u64 display_id, u64 layer_id);
-
-    /// Finds the layer identified by the specified ID in the desired display.
-    const Layer& FindLayer(u64 display_id, u64 layer_id) const;
+    /// Returns the layer identified by the specified id in the desired display.
+    Layer& GetLayer(u64 display_id, u64 layer_id);
 
     std::shared_ptr<Nvidia::Module> nvdrv;
 

src/core/hle/service/vi/vi.cpp

@@ -524,7 +524,7 @@ private:
         LOG_DEBUG(Service_VI, "called. id=0x{:08X} transaction={:X}, flags=0x{:08X}", id,
                   static_cast<u32>(transaction), flags);
 
-        auto buffer_queue = nv_flinger->FindBufferQueue(id);
+        auto buffer_queue = nv_flinger->GetBufferQueue(id);
 
         if (transaction == TransactionId::Connect) {
             IGBPConnectRequestParcel request{ctx.ReadBuffer()};
@@ -558,7 +558,7 @@ private:
                     [=](Kernel::SharedPtr<Kernel::Thread> thread, Kernel::HLERequestContext& ctx,
                         Kernel::ThreadWakeupReason reason) {
                         // Repeat TransactParcel DequeueBuffer when a buffer is available
-                        auto buffer_queue = nv_flinger->FindBufferQueue(id);
+                        auto buffer_queue = nv_flinger->GetBufferQueue(id);
                         std::optional<u32> slot = buffer_queue->DequeueBuffer(width, height);
                         ASSERT_MSG(slot != std::nullopt, "Could not dequeue buffer.");
 
@@ -628,7 +628,7 @@ private:
 
         LOG_WARNING(Service_VI, "(STUBBED) called id={}, unknown={:08X}", id, unknown);
 
-        const auto buffer_queue = nv_flinger->FindBufferQueue(id);
+        const auto buffer_queue = nv_flinger->GetBufferQueue(id);
 
         // TODO(Subv): Find out what this actually is.
         IPC::ResponseBuilder rb{ctx, 2, 1};
@@ -1044,7 +1044,7 @@ private:
         LOG_DEBUG(Service_VI, "called. layer_id=0x{:016X}, aruid=0x{:016X}", layer_id, aruid);
 
         const u64 display_id = nv_flinger->OpenDisplay(display_name);
-        const u32 buffer_queue_id = nv_flinger->FindBufferQueueId(display_id, layer_id);
+        const u32 buffer_queue_id = nv_flinger->GetBufferQueueId(display_id, layer_id);
 
         NativeWindow native_window{buffer_queue_id};
         IPC::ResponseBuilder rb{ctx, 4};
@@ -1063,7 +1063,7 @@ private:
         // TODO(Subv): What's the difference between a Stray and a Managed layer?
 
         const u64 layer_id = nv_flinger->CreateLayer(display_id);
-        const u32 buffer_queue_id = nv_flinger->FindBufferQueueId(display_id, layer_id);
+        const u32 buffer_queue_id = nv_flinger->GetBufferQueueId(display_id, layer_id);
 
         NativeWindow native_window{buffer_queue_id};
         IPC::ResponseBuilder rb{ctx, 6};

src/video_core/engines/shader_bytecode.h

@@ -1248,11 +1248,19 @@ union Instruction {
     union {
         BitField<20, 14, u64> offset;
         BitField<34, 5, u64> index;
+
+        u64 GetOffset() const {
+            return offset * 4;
+        }
     } cbuf34;
 
     union {
         BitField<20, 16, s64> offset;
         BitField<36, 5, u64> index;
+
+        s64 GetOffset() const {
+            return offset;
+        }
     } cbuf36;
 
     // Unsure about the size of this one.

src/video_core/renderer_opengl/gl_rasterizer.cpp

@@ -957,7 +957,7 @@ void RasterizerOpenGL::SetupConstBuffers(Tegra::Engines::Maxwell3D::Regs::Shader
             }
         } else {
             // Buffer is accessed directly, upload just what we use
-            size = used_buffer.GetSize() * sizeof(float);
+            size = used_buffer.GetSize();
         }
 
         // Align the actual size so it ends up being a multiple of vec4 to meet the OpenGL std140

src/video_core/renderer_opengl/gl_shader_decompiler.cpp

@@ -543,8 +543,9 @@ private:
             if (const auto immediate = std::get_if<ImmediateNode>(offset)) {
                 // Direct access
                 const u32 offset_imm = immediate->GetValue();
-                return fmt::format("{}[{}][{}]", GetConstBuffer(cbuf->GetIndex()), offset_imm / 4,
-                                   offset_imm % 4);
+                ASSERT_MSG(offset_imm % 4 == 0, "Unaligned cbuf direct access");
+                return fmt::format("{}[{}][{}]", GetConstBuffer(cbuf->GetIndex()),
+                                   offset_imm / (4 * 4), (offset_imm / 4) % 4);
 
             } else if (std::holds_alternative<OperationNode>(*offset)) {
                 // Indirect access

src/video_core/shader/decode/arithmetic.cpp

@@ -25,7 +25,7 @@ u32 ShaderIR::DecodeArithmetic(BasicBlock& bb, const BasicBlock& code, u32 pc) {
         } else if (instr.is_b_gpr) {
             return GetRegister(instr.gpr20);
         } else {
-            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
+            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
         }
     }();
 

src/video_core/shader/decode/arithmetic_half.cpp

@@ -35,7 +35,7 @@ u32 ShaderIR::DecodeArithmeticHalf(BasicBlock& bb, const BasicBlock& code, u32 p
         switch (opcode->get().GetId()) {
         case OpCode::Id::HADD2_C:
         case OpCode::Id::HMUL2_C:
-            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
+            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
         case OpCode::Id::HADD2_R:
         case OpCode::Id::HMUL2_R:
             return GetRegister(instr.gpr20);

src/video_core/shader/decode/arithmetic_integer.cpp

@@ -26,7 +26,7 @@ u32 ShaderIR::DecodeArithmeticInteger(BasicBlock& bb, const BasicBlock& code, u3
         } else if (instr.is_b_gpr) {
             return GetRegister(instr.gpr20);
         } else {
-            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
+            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
         }
     }();
 

src/video_core/shader/decode/conversion.cpp

@@ -48,7 +48,7 @@ u32 ShaderIR::DecodeConversion(BasicBlock& bb, const BasicBlock& code, u32 pc) {
             if (instr.is_b_gpr) {
                 return GetRegister(instr.gpr20);
             } else {
-                return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
+                return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
             }
         }();
         const bool input_signed = instr.conversion.is_input_signed;
@@ -72,7 +72,7 @@ u32 ShaderIR::DecodeConversion(BasicBlock& bb, const BasicBlock& code, u32 pc) {
             if (instr.is_b_gpr) {
                 return GetRegister(instr.gpr20);
             } else {
-                return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
+                return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
             }
         }();
 
@@ -110,7 +110,7 @@ u32 ShaderIR::DecodeConversion(BasicBlock& bb, const BasicBlock& code, u32 pc) {
             if (instr.is_b_gpr) {
                 return GetRegister(instr.gpr20);
             } else {
-                return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
+                return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
             }
         }();
 

src/video_core/shader/decode/ffma.cpp

@@ -27,14 +27,14 @@ u32 ShaderIR::DecodeFfma(BasicBlock& bb, const BasicBlock& code, u32 pc) {
     auto [op_b, op_c] = [&]() -> std::tuple<Node, Node> {
         switch (opcode->get().GetId()) {
         case OpCode::Id::FFMA_CR: {
-            return {GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset),
+            return {GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset()),
                     GetRegister(instr.gpr39)};
         }
         case OpCode::Id::FFMA_RR:
             return {GetRegister(instr.gpr20), GetRegister(instr.gpr39)};
         case OpCode::Id::FFMA_RC: {
             return {GetRegister(instr.gpr39),
-                    GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)};
+                    GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset())};
         }
         case OpCode::Id::FFMA_IMM:
             return {GetImmediate19(instr), GetRegister(instr.gpr39)};

src/video_core/shader/decode/float_set.cpp

@@ -25,7 +25,7 @@ u32 ShaderIR::DecodeFloatSet(BasicBlock& bb, const BasicBlock& code, u32 pc) {
         } else if (instr.is_b_gpr) {
             return GetRegister(instr.gpr20);
         } else {
-            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
+            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
         }
     }();
 

src/video_core/shader/decode/float_set_predicate.cpp

@@ -25,7 +25,7 @@ u32 ShaderIR::DecodeFloatSetPredicate(BasicBlock& bb, const BasicBlock& code, u3
         } else if (instr.is_b_gpr) {
             return GetRegister(instr.gpr20);
         } else {
-            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
+            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
         }
     }();
     op_b = GetOperandAbsNegFloat(op_b, instr.fsetp.abs_b, false);

src/video_core/shader/decode/hfma2.cpp

@@ -39,13 +39,14 @@ u32 ShaderIR::DecodeHfma2(BasicBlock& bb, const BasicBlock& code, u32 pc) {
             neg_b = instr.hfma2.negate_b;
             neg_c = instr.hfma2.negate_c;
             return {instr.hfma2.saturate, instr.hfma2.type_b,
-                    GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset), instr.hfma2.type_reg39,
-                    GetRegister(instr.gpr39)};
+                    GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset()),
+                    instr.hfma2.type_reg39, GetRegister(instr.gpr39)};
         case OpCode::Id::HFMA2_RC:
             neg_b = instr.hfma2.negate_b;
             neg_c = instr.hfma2.negate_c;
             return {instr.hfma2.saturate, instr.hfma2.type_reg39, GetRegister(instr.gpr39),
-                    instr.hfma2.type_b, GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)};
+                    instr.hfma2.type_b,
+                    GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset())};
         case OpCode::Id::HFMA2_RR:
             neg_b = instr.hfma2.rr.negate_b;
             neg_c = instr.hfma2.rr.negate_c;

src/video_core/shader/decode/integer_set.cpp

@@ -23,7 +23,7 @@ u32 ShaderIR::DecodeIntegerSet(BasicBlock& bb, const BasicBlock& code, u32 pc) {
         } else if (instr.is_b_gpr) {
             return GetRegister(instr.gpr20);
         } else {
-            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
+            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
         }
     }();
 

src/video_core/shader/decode/integer_set_predicate.cpp

@@ -25,7 +25,7 @@ u32 ShaderIR::DecodeIntegerSetPredicate(BasicBlock& bb, const BasicBlock& code,
         } else if (instr.is_b_gpr) {
             return GetRegister(instr.gpr20);
         } else {
-            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
+            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
         }
     }();
 

src/video_core/shader/decode/memory.cpp

@@ -80,7 +80,7 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, const BasicBlock& code, u32 pc) {
         Node index = GetRegister(instr.gpr8);
 
         const Node op_a =
-            GetConstBufferIndirect(instr.cbuf36.index, instr.cbuf36.offset + 0, index);
+            GetConstBufferIndirect(instr.cbuf36.index, instr.cbuf36.GetOffset() + 0, index);
 
         switch (instr.ld_c.type.Value()) {
         case Tegra::Shader::UniformType::Single:
@@ -89,7 +89,7 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, const BasicBlock& code, u32 pc) {
 
         case Tegra::Shader::UniformType::Double: {
             const Node op_b =
-                GetConstBufferIndirect(instr.cbuf36.index, instr.cbuf36.offset + 4, index);
+                GetConstBufferIndirect(instr.cbuf36.index, instr.cbuf36.GetOffset() + 4, index);
 
             SetTemporal(bb, 0, op_a);
             SetTemporal(bb, 1, op_b);
@@ -142,7 +142,7 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, const BasicBlock& code, u32 pc) {
         ASSERT(cbuf != nullptr);
         const auto cbuf_offset_imm = std::get_if<ImmediateNode>(cbuf->GetOffset());
         ASSERT(cbuf_offset_imm != nullptr);
-        const auto cbuf_offset = cbuf_offset_imm->GetValue() * 4;
+        const auto cbuf_offset = cbuf_offset_imm->GetValue();
 
         bb.push_back(Comment(
             fmt::format("Base address is c[0x{:x}][0x{:x}]", cbuf->GetIndex(), cbuf_offset)));

src/video_core/shader/decode/shift.cpp

@@ -23,7 +23,7 @@ u32 ShaderIR::DecodeShift(BasicBlock& bb, const BasicBlock& code, u32 pc) {
         } else if (instr.is_b_gpr) {
             return GetRegister(instr.gpr20);
         } else {
-            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
+            return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
         }
     }();
 

src/video_core/shader/decode/xmad.cpp

@@ -32,13 +32,14 @@ u32 ShaderIR::DecodeXmad(BasicBlock& bb, const BasicBlock& code, u32 pc) {
     auto [is_merge, op_b, op_c] = [&]() -> std::tuple<bool, Node, Node> {
         switch (opcode->get().GetId()) {
         case OpCode::Id::XMAD_CR:
-            return {instr.xmad.merge_56, GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset),
+            return {instr.xmad.merge_56,
+                    GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset()),
                     GetRegister(instr.gpr39)};
         case OpCode::Id::XMAD_RR:
             return {instr.xmad.merge_37, GetRegister(instr.gpr20), GetRegister(instr.gpr39)};
         case OpCode::Id::XMAD_RC:
             return {false, GetRegister(instr.gpr39),
-                    GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)};
+                    GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset())};
         case OpCode::Id::XMAD_IMM:
             return {instr.xmad.merge_37, Immediate(static_cast<u32>(instr.xmad.imm20_16)),
                     GetRegister(instr.gpr39)};

src/video_core/shader/shader_ir.h

@@ -249,7 +249,7 @@ public:
     }
 
     u32 GetSize() const {
-        return max_offset + 1;
+        return max_offset + sizeof(float);
     }
 
 private: