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30 Commits

Author SHA1 Message Date
bunnei
91e19deb39 vi: Add FENCE_HACK, which is useful for booting BOTW. 2018-02-12 21:24:40 -05:00
bunnei
a9e4e8294a vi: Stub TransactParcel CancelBuffer. 2018-02-12 21:24:39 -05:00
bunnei
4f969e2271 TransactParcel: Move WriteBlock to narrowest scope. 2018-02-12 21:24:38 -05:00
bunnei
0a87eb71ba Merge pull request #180 from MerryMage/f/dynarmic/direct-page-table
arm_dynarmic: Support direct page table access
2018-02-12 19:17:31 -05:00
MerryMage
6085d32cf5 arm_dynarmic: Support direct page table access 2018-02-12 21:53:32 +00:00
bunnei
ce8006e851 Merge pull request #179 from gdkchan/audren_stubs
Stub RequestUpdateAudioRenderer, StartAudioRenderer and StopAudioRenderer
2018-02-12 16:33:30 -05:00
gdkchan
3160f83607 Add RequestUpdateAudioRenderer, StartAudioRenderer and StopAudioRenderer stubs to audren:u 2018-02-12 17:44:55 -03:00
bunnei
be5ba4d952 Merge pull request #178 from Subv/command_buffers
GPU: Added a command processor to decode the GPU pushbuffers and forward the commands to their respective engines
2018-02-12 13:51:52 -05:00
Subv
6cddf9d88e Make a GPU class in VideoCore to contain the GPU state.
Also moved the GPU MemoryManager class to video_core since it makes more sense for it to be there.
2018-02-11 23:44:12 -05:00
Subv
e01a8f2187 GPU: Added a command processor to decode the GPU pushbuffers and forward the commands to their respective engines. 2018-02-11 22:42:48 -05:00
bunnei
890e98a33e Merge pull request #177 from bunnei/vi-fixes
Several misc. VI fixes
2018-02-11 21:47:35 -05:00
Subv
ba2426aa3f nvdrv: Make the GPU memory manager available to nvhost-gpu. 2018-02-11 21:30:23 -05:00
bunnei
deadcb39c2 renderer_opengl: Support framebuffer flip vertical. 2018-02-11 21:03:55 -05:00
bunnei
6fce1414c3 vi: Parse IGBPQueueBufferRequestParcel params and expose buffer flip vertical. 2018-02-11 21:00:41 -05:00
bunnei
068744db1b vi: Fix OpenLayer and CreateStrayLayer. 2018-02-11 17:28:07 -05:00
bunnei
b26cdf1fe5 Merge pull request #175 from bunnei/libnx-fixes-2
More fixes for Libnx
2018-02-10 01:14:40 -05:00
bunnei
8e7da73214 fsp_srv: Stub MountSdCard. 2018-02-09 23:33:50 -05:00
bunnei
0532de6559 apm: Refactor service impl. to support multiple ports. 2018-02-09 23:33:49 -05:00
bunnei
c83a1b2320 vi: Implement TransactParcelAuto. 2018-02-09 23:33:49 -05:00
bunnei
725304094e nvflinger: (Hack) Use first available buffer if none are found. 2018-02-09 23:33:49 -05:00
bunnei
63de56ee0f IGBPQueueBufferRequestParcel: Don't enforce buffer length.
- Another fix for libnx.
2018-02-09 23:33:49 -05:00
bunnei
309276a317 IGBPRequestBufferResponseParcel: Fix response for libnx. 2018-02-09 23:33:43 -05:00
bunnei
1add3b20c4 Merge pull request #171 from bunnei/libnx-fixes
Various fixes for libnx, etc.
2018-02-09 15:51:43 -05:00
bunnei
3b35202280 Merge pull request #173 from MerryMage/feature/dynarmic-fix-windows
dynarmic: Fix bug due to Windows ABI mismatch
2018-02-09 13:07:15 -05:00
MerryMage
45e5a67676 dynarmic: Fix bug due to Windows ABI mismatch 2018-02-09 16:05:28 +00:00
bunnei
22caeee64f nvdrv: Fix QueryEvent for libnx. 2018-02-09 00:56:45 -05:00
bunnei
576f0cf027 IApplicationDisplayService::CloseDisplay: Fix response params size. 2018-02-08 23:20:23 -05:00
bunnei
ca99063600 nvhost_ctrl_gpu: Implement ZCullGetInfo. 2018-02-08 23:17:59 -05:00
bunnei
205daab50d Merge pull request #170 from MerryMage/feature/dynarmic-update-201802
dynarmic: Update to 41ae12263
2018-02-08 23:12:57 -05:00
bunnei
dc0a137e5b acc_u0: Implement ListAllUsers. 2018-02-08 18:59:23 -05:00
45 changed files with 757 additions and 173 deletions

View File

@@ -92,6 +92,8 @@ add_library(core STATIC
hle/service/aoc/aoc_u.h
hle/service/apm/apm.cpp
hle/service/apm/apm.h
hle/service/apm/interface.cpp
hle/service/apm/interface.h
hle/service/audio/audio.cpp
hle/service/audio/audio.h
hle/service/audio/audin_u.cpp
@@ -137,8 +139,6 @@ add_library(core STATIC
hle/service/nvdrv/devices/nvmap.h
hle/service/nvdrv/interface.cpp
hle/service/nvdrv/interface.h
hle/service/nvdrv/memory_manager.cpp
hle/service/nvdrv/memory_manager.h
hle/service/nvdrv/nvdrv.cpp
hle/service/nvdrv/nvdrv.h
hle/service/nvdrv/nvmemp.cpp

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@@ -85,11 +85,19 @@ public:
ARM_Dynarmic& parent;
size_t ticks_remaining = 0;
size_t num_interpreted_instructions = 0;
u64 tpidrr0_el0 = 0;
u64 tpidrro_el0 = 0;
};
std::unique_ptr<Dynarmic::A64::Jit> MakeJit(const std::unique_ptr<ARM_Dynarmic_Callbacks>& cb) {
Dynarmic::A64::UserConfig config{cb.get()};
const auto page_table = Kernel::g_current_process->vm_manager.page_table.pointers.data();
Dynarmic::A64::UserConfig config;
config.callbacks = cb.get();
config.tpidrro_el0 = &cb->tpidrro_el0;
config.dczid_el0 = 4;
config.page_table = reinterpret_cast<void**>(page_table);
config.page_table_address_space_bits = Memory::ADDRESS_SPACE_BITS;
config.silently_mirror_page_table = false;
return std::make_unique<Dynarmic::A64::Jit>(config);
}
@@ -149,11 +157,11 @@ void ARM_Dynarmic::SetCPSR(u32 cpsr) {
}
u64 ARM_Dynarmic::GetTlsAddress() const {
return cb->tpidrr0_el0;
return cb->tpidrro_el0;
}
void ARM_Dynarmic::SetTlsAddress(u64 address) {
cb->tpidrr0_el0 = address;
cb->tpidrro_el0 = address;
}
void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
@@ -170,7 +178,7 @@ void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
ctx.cpsr = jit->GetPstate();
ctx.fpu_registers = jit->GetVectors();
ctx.fpscr = jit->GetFpcr();
ctx.tls_address = cb->tpidrr0_el0;
ctx.tls_address = cb->tpidrro_el0;
}
void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
@@ -180,7 +188,7 @@ void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
jit->SetPstate(static_cast<u32>(ctx.cpsr));
jit->SetVectors(ctx.fpu_registers);
jit->SetFpcr(static_cast<u32>(ctx.fpscr));
cb->tpidrr0_el0 = ctx.tls_address;
cb->tpidrro_el0 = ctx.tls_address;
}
void ARM_Dynarmic::PrepareReschedule() {

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@@ -154,6 +154,8 @@ System::ResultStatus System::Init(EmuWindow* emu_window, u32 system_mode) {
break;
}
gpu_core = std::make_unique<Tegra::GPU>();
telemetry_session = std::make_unique<Core::TelemetrySession>();
CoreTiming::Init();

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@@ -11,6 +11,7 @@
#include "core/memory.h"
#include "core/perf_stats.h"
#include "core/telemetry_session.h"
#include "video_core/gpu.h"
class EmuWindow;
class ARM_Interface;
@@ -102,6 +103,10 @@ public:
return *cpu_core;
}
Tegra::GPU& GPU() {
return *gpu_core;
}
PerfStats perf_stats;
FrameLimiter frame_limiter;
@@ -138,6 +143,8 @@ private:
///< ARM11 CPU core
std::unique_ptr<ARM_Interface> cpu_core;
std::unique_ptr<Tegra::GPU> gpu_core;
/// When true, signals that a reschedule should happen
bool reschedule_pending{};

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@@ -9,6 +9,9 @@
namespace Service {
namespace Account {
using Uid = std::array<u64, 2>;
static constexpr Uid DEFAULT_USER_ID{0x10ull, 0x20ull};
class IProfile final : public ServiceFramework<IProfile> {
public:
IProfile() : ServiceFramework("IProfile") {
@@ -61,6 +64,15 @@ void ACC_U0::GetUserExistence(Kernel::HLERequestContext& ctx) {
rb.Push(true); // TODO: Check when this is supposed to return true and when not
}
void ACC_U0::ListAllUsers(Kernel::HLERequestContext& ctx) {
constexpr std::array<u128, 10> user_ids{DEFAULT_USER_ID};
const auto& output_buffer = ctx.BufferDescriptorC()[0];
Memory::WriteBlock(output_buffer.Address(), user_ids.data(), user_ids.size());
IPC::ResponseBuilder rb{ctx, 2};
rb.Push(RESULT_SUCCESS);
LOG_DEBUG(Service_ACC, "called");
}
void ACC_U0::GetProfile(Kernel::HLERequestContext& ctx) {
IPC::ResponseBuilder rb{ctx, 2, 0, 1};
rb.Push(RESULT_SUCCESS);
@@ -85,13 +97,13 @@ void ACC_U0::GetLastOpenedUser(Kernel::HLERequestContext& ctx) {
LOG_WARNING(Service_ACC, "(STUBBED) called");
IPC::ResponseBuilder rb{ctx, 6};
rb.Push(RESULT_SUCCESS);
rb.Push<u64>(0x0);
rb.Push<u64>(0x0);
rb.PushRaw(DEFAULT_USER_ID);
}
ACC_U0::ACC_U0() : ServiceFramework("acc:u0") {
static const FunctionInfo functions[] = {
{1, &ACC_U0::GetUserExistence, "GetUserExistence"},
{2, &ACC_U0::ListAllUsers, "ListAllUsers"},
{4, &ACC_U0::GetLastOpenedUser, "GetLastOpenedUser"},
{5, &ACC_U0::GetProfile, "GetProfile"},
{100, &ACC_U0::InitializeApplicationInfo, "InitializeApplicationInfo"},

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@@ -28,6 +28,7 @@ public:
private:
void GetUserExistence(Kernel::HLERequestContext& ctx);
void ListAllUsers(Kernel::HLERequestContext& ctx);
void GetLastOpenedUser(Kernel::HLERequestContext& ctx);
void GetProfile(Kernel::HLERequestContext& ctx);
void InitializeApplicationInfo(Kernel::HLERequestContext& ctx);

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@@ -5,63 +5,15 @@
#include "common/logging/log.h"
#include "core/hle/ipc_helpers.h"
#include "core/hle/service/apm/apm.h"
#include "core/hle/service/apm/interface.h"
namespace Service {
namespace APM {
void InstallInterfaces(SM::ServiceManager& service_manager) {
std::make_shared<APM>()->InstallAsService(service_manager);
}
class ISession final : public ServiceFramework<ISession> {
public:
ISession() : ServiceFramework("ISession") {
static const FunctionInfo functions[] = {
{0, &ISession::SetPerformanceConfiguration, "SetPerformanceConfiguration"},
{1, &ISession::GetPerformanceConfiguration, "GetPerformanceConfiguration"},
};
RegisterHandlers(functions);
}
private:
void SetPerformanceConfiguration(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp{ctx};
auto mode = static_cast<PerformanceMode>(rp.Pop<u32>());
u32 config = rp.Pop<u32>();
IPC::ResponseBuilder rb{ctx, 2};
rb.Push(RESULT_SUCCESS);
LOG_WARNING(Service_APM, "(STUBBED) called mode=%u config=%u", static_cast<u32>(mode),
config);
}
void GetPerformanceConfiguration(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp{ctx};
auto mode = static_cast<PerformanceMode>(rp.Pop<u32>());
IPC::ResponseBuilder rb{ctx, 3};
rb.Push(RESULT_SUCCESS);
rb.Push<u32>(0); // Performance configuration
LOG_WARNING(Service_APM, "(STUBBED) called mode=%u", static_cast<u32>(mode));
}
};
APM::APM() : ServiceFramework("apm") {
static const FunctionInfo functions[] = {
{0x00000000, &APM::OpenSession, "OpenSession"},
{0x00000001, nullptr, "GetPerformanceMode"},
};
RegisterHandlers(functions);
}
void APM::OpenSession(Kernel::HLERequestContext& ctx) {
IPC::ResponseBuilder rb{ctx, 2, 0, 1};
rb.Push(RESULT_SUCCESS);
rb.PushIpcInterface<ISession>();
auto module_ = std::make_shared<Module>();
std::make_shared<APM>(module_, "apm")->InstallAsService(service_manager);
std::make_shared<APM>(module_, "apm:p")->InstallAsService(service_manager);
}
} // namespace APM

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@@ -14,13 +14,10 @@ enum class PerformanceMode : u8 {
Docked = 1,
};
class APM final : public ServiceFramework<APM> {
class Module final {
public:
APM();
~APM() = default;
private:
void OpenSession(Kernel::HLERequestContext& ctx);
Module() = default;
~Module() = default;
};
/// Registers all AM services with the specified service manager.

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@@ -0,0 +1,66 @@
// Copyright 2018 yuzu emulator team
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "common/logging/log.h"
#include "core/hle/ipc_helpers.h"
#include "core/hle/service/apm/apm.h"
#include "core/hle/service/apm/interface.h"
namespace Service {
namespace APM {
class ISession final : public ServiceFramework<ISession> {
public:
ISession() : ServiceFramework("ISession") {
static const FunctionInfo functions[] = {
{0, &ISession::SetPerformanceConfiguration, "SetPerformanceConfiguration"},
{1, &ISession::GetPerformanceConfiguration, "GetPerformanceConfiguration"},
};
RegisterHandlers(functions);
}
private:
void SetPerformanceConfiguration(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp{ctx};
auto mode = static_cast<PerformanceMode>(rp.Pop<u32>());
u32 config = rp.Pop<u32>();
IPC::ResponseBuilder rb{ctx, 2};
rb.Push(RESULT_SUCCESS);
LOG_WARNING(Service_APM, "(STUBBED) called mode=%u config=%u", static_cast<u32>(mode),
config);
}
void GetPerformanceConfiguration(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp{ctx};
auto mode = static_cast<PerformanceMode>(rp.Pop<u32>());
IPC::ResponseBuilder rb{ctx, 3};
rb.Push(RESULT_SUCCESS);
rb.Push<u32>(0); // Performance configuration
LOG_WARNING(Service_APM, "(STUBBED) called mode=%u", static_cast<u32>(mode));
}
};
APM::APM(std::shared_ptr<Module> apm, const char* name)
: ServiceFramework(name), apm(std::move(apm)) {
static const FunctionInfo functions[] = {
{0, &APM::OpenSession, "OpenSession"},
{1, nullptr, "GetPerformanceMode"},
};
RegisterHandlers(functions);
}
void APM::OpenSession(Kernel::HLERequestContext& ctx) {
IPC::ResponseBuilder rb{ctx, 2, 0, 1};
rb.Push(RESULT_SUCCESS);
rb.PushIpcInterface<ISession>();
}
} // namespace APM
} // namespace Service

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@@ -0,0 +1,27 @@
// Copyright 2018 yuzu emulator team
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "core/hle/service/service.h"
namespace Service {
namespace APM {
class APM final : public ServiceFramework<APM> {
public:
APM(std::shared_ptr<Module> apm, const char* name);
~APM() = default;
private:
void OpenSession(Kernel::HLERequestContext& ctx);
std::shared_ptr<Module> apm;
};
/// Registers all AM services with the specified service manager.
void InstallInterfaces(SM::ServiceManager& service_manager);
} // namespace APM
} // namespace Service

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@@ -20,8 +20,8 @@ public:
{0x2, nullptr, "GetAudioRendererMixBufferCount"},
{0x3, nullptr, "GetAudioRendererState"},
{0x4, &IAudioRenderer::RequestUpdateAudioRenderer, "RequestUpdateAudioRenderer"},
{0x5, nullptr, "StartAudioRenderer"},
{0x6, nullptr, "StopAudioRenderer"},
{0x5, &IAudioRenderer::StartAudioRenderer, "StartAudioRenderer"},
{0x6, &IAudioRenderer::StopAudioRenderer, "StopAudioRenderer"},
{0x7, &IAudioRenderer::QuerySystemEvent, "QuerySystemEvent"},
{0x8, nullptr, "SetAudioRendererRenderingTimeLimit"},
{0x9, nullptr, "GetAudioRendererRenderingTimeLimit"},
@@ -35,6 +35,42 @@ public:
private:
void RequestUpdateAudioRenderer(Kernel::HLERequestContext& ctx) {
AudioRendererResponseData response_data = {0};
response_data.section_0_size =
response_data.state_entries.size() * sizeof(AudioRendererStateEntry);
response_data.section_1_size = response_data.section_1.size();
response_data.section_2_size = response_data.section_2.size();
response_data.section_3_size = response_data.section_3.size();
response_data.section_4_size = response_data.section_4.size();
response_data.section_5_size = response_data.section_5.size();
response_data.total_size = sizeof(AudioRendererResponseData);
for (unsigned i = 0; i < response_data.state_entries.size(); i++) {
// 4 = Busy and 5 = Ready?
response_data.state_entries[i].state = 5;
}
auto& buffer = ctx.BufferDescriptorB()[0];
Memory::WriteBlock(buffer.Address(), &response_data, response_data.total_size);
IPC::ResponseBuilder rb{ctx, 2};
rb.Push(RESULT_SUCCESS);
LOG_WARNING(Service_Audio, "(STUBBED) called");
}
void StartAudioRenderer(Kernel::HLERequestContext& ctx) {
IPC::ResponseBuilder rb{ctx, 2};
rb.Push(RESULT_SUCCESS);
LOG_WARNING(Service_Audio, "(STUBBED) called");
}
void StopAudioRenderer(Kernel::HLERequestContext& ctx) {
IPC::ResponseBuilder rb{ctx, 2};
rb.Push(RESULT_SUCCESS);
@@ -52,6 +88,44 @@ private:
LOG_WARNING(Service_Audio, "(STUBBED) called");
}
struct AudioRendererStateEntry {
u32_le state;
u32_le unknown_4;
u32_le unknown_8;
u32_le unknown_c;
};
static_assert(sizeof(AudioRendererStateEntry) == 0x10,
"AudioRendererStateEntry has wrong size");
struct AudioRendererResponseData {
u32_le unknown_0;
u32_le section_5_size;
u32_le section_0_size;
u32_le section_1_size;
u32_le unknown_10;
u32_le section_2_size;
u32_le unknown_18;
u32_le section_3_size;
u32_le section_4_size;
u32_le unknown_24;
u32_le unknown_28;
u32_le unknown_2c;
u32_le unknown_30;
u32_le unknown_34;
u32_le unknown_38;
u32_le total_size;
std::array<AudioRendererStateEntry, 0x18e> state_entries;
std::array<u8, 0x600> section_1;
std::array<u8, 0xe0> section_2;
std::array<u8, 0x20> section_3;
std::array<u8, 0x10> section_4;
std::array<u8, 0xb0> section_5;
};
static_assert(sizeof(AudioRendererResponseData) == 0x20e0,
"AudioRendererResponseData has wrong size");
Kernel::SharedPtr<Kernel::Event> system_event;
};

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@@ -70,6 +70,7 @@ private:
FSP_SRV::FSP_SRV() : ServiceFramework("fsp-srv") {
static const FunctionInfo functions[] = {
{1, &FSP_SRV::Initalize, "Initalize"},
{18, &FSP_SRV::MountSdCard, "MountSdCard"},
{200, &FSP_SRV::OpenDataStorageByCurrentProcess, "OpenDataStorageByCurrentProcess"},
{202, nullptr, "OpenDataStorageByDataId"},
{203, &FSP_SRV::OpenRomStorage, "OpenRomStorage"},
@@ -96,6 +97,13 @@ void FSP_SRV::Initalize(Kernel::HLERequestContext& ctx) {
rb.Push(RESULT_SUCCESS);
}
void FSP_SRV::MountSdCard(Kernel::HLERequestContext& ctx) {
LOG_WARNING(Service_FS, "(STUBBED) called");
IPC::ResponseBuilder rb{ctx, 2};
rb.Push(RESULT_SUCCESS);
}
void FSP_SRV::GetGlobalAccessLogMode(Kernel::HLERequestContext& ctx) {
LOG_WARNING(Service_FS, "(STUBBED) called");

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@@ -23,6 +23,7 @@ private:
void TryLoadRomFS();
void Initalize(Kernel::HLERequestContext& ctx);
void MountSdCard(Kernel::HLERequestContext& ctx);
void GetGlobalAccessLogMode(Kernel::HLERequestContext& ctx);
void OpenDataStorageByCurrentProcess(Kernel::HLERequestContext& ctx);
void OpenRomStorage(Kernel::HLERequestContext& ctx);

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@@ -20,15 +20,17 @@ u32 nvdisp_disp0::ioctl(Ioctl command, const std::vector<u8>& input, std::vector
}
void nvdisp_disp0::flip(u32 buffer_handle, u32 offset, u32 format, u32 width, u32 height,
u32 stride) {
u32 stride, NVFlinger::BufferQueue::BufferTransformFlags transform) {
VAddr addr = nvmap_dev->GetObjectAddress(buffer_handle);
LOG_WARNING(Service,
"Drawing from address %llx offset %08X Width %u Height %u Stride %u Format %u",
addr, offset, width, height, stride, format);
using PixelFormat = RendererBase::FramebufferInfo::PixelFormat;
using Flags = NVFlinger::BufferQueue::BufferTransformFlags;
const bool flip_vertical = static_cast<u32>(transform) & static_cast<u32>(Flags::FlipV);
const RendererBase::FramebufferInfo framebuffer_info{
addr, offset, width, height, stride, static_cast<PixelFormat>(format)};
addr, offset, width, height, stride, static_cast<PixelFormat>(format), flip_vertical};
Core::System::GetInstance().perf_stats.EndGameFrame();
VideoCore::g_renderer->SwapBuffers(framebuffer_info);

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@@ -8,6 +8,7 @@
#include <vector>
#include "common/common_types.h"
#include "core/hle/service/nvdrv/devices/nvdevice.h"
#include "core/hle/service/nvflinger/buffer_queue.h"
namespace Service {
namespace Nvidia {
@@ -23,7 +24,8 @@ public:
u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output) override;
/// Performs a screen flip, drawing the buffer pointed to by the handle.
void flip(u32 buffer_handle, u32 offset, u32 format, u32 width, u32 height, u32 stride);
void flip(u32 buffer_handle, u32 offset, u32 format, u32 width, u32 height, u32 stride,
NVFlinger::BufferQueue::BufferTransformFlags transform);
private:
std::shared_ptr<nvmap> nvmap_dev;

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@@ -4,6 +4,7 @@
#include "common/assert.h"
#include "common/logging/log.h"
#include "core/core.h"
#include "core/hle/service/nvdrv/devices/nvhost_as_gpu.h"
#include "core/hle/service/nvdrv/devices/nvmap.h"
@@ -44,11 +45,12 @@ u32 nvhost_as_gpu::AllocateSpace(const std::vector<u8>& input, std::vector<u8>&
LOG_DEBUG(Service_NVDRV, "called, pages=%x, page_size=%x, flags=%x", params.pages,
params.page_size, params.flags);
auto& gpu = Core::System::GetInstance().GPU();
const u64 size{static_cast<u64>(params.pages) * static_cast<u64>(params.page_size)};
if (params.flags & 1) {
params.offset = memory_manager->AllocateSpace(params.offset, size, 1);
params.offset = gpu.memory_manager->AllocateSpace(params.offset, size, 1);
} else {
params.offset = memory_manager->AllocateSpace(size, params.align);
params.offset = gpu.memory_manager->AllocateSpace(size, params.align);
}
std::memcpy(output.data(), &params, output.size());
@@ -71,10 +73,12 @@ u32 nvhost_as_gpu::MapBufferEx(const std::vector<u8>& input, std::vector<u8>& ou
auto object = nvmap_dev->GetObject(params.nvmap_handle);
ASSERT(object);
auto& gpu = Core::System::GetInstance().GPU();
if (params.flags & 1) {
params.offset = memory_manager->MapBufferEx(object->addr, params.offset, object->size);
params.offset = gpu.memory_manager->MapBufferEx(object->addr, params.offset, object->size);
} else {
params.offset = memory_manager->MapBufferEx(object->addr, object->size);
params.offset = gpu.memory_manager->MapBufferEx(object->addr, object->size);
}
std::memcpy(output.data(), &params, output.size());

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@@ -10,7 +10,6 @@
#include "common/common_types.h"
#include "common/swap.h"
#include "core/hle/service/nvdrv/devices/nvdevice.h"
#include "core/hle/service/nvdrv/memory_manager.h"
namespace Service {
namespace Nvidia {
@@ -20,9 +19,7 @@ class nvmap;
class nvhost_as_gpu final : public nvdevice {
public:
nvhost_as_gpu(std::shared_ptr<nvmap> nvmap_dev) : nvdevice(), nvmap_dev(std::move(nvmap_dev)) {
memory_manager = std::make_shared<MemoryManager>();
}
nvhost_as_gpu(std::shared_ptr<nvmap> nvmap_dev) : nvmap_dev(std::move(nvmap_dev)) {}
~nvhost_as_gpu() override = default;
u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output) override;
@@ -101,7 +98,6 @@ private:
u32 GetVARegions(const std::vector<u8>& input, std::vector<u8>& output);
std::shared_ptr<nvmap> nvmap_dev;
std::shared_ptr<MemoryManager> memory_manager;
};
} // namespace Devices

View File

@@ -104,8 +104,20 @@ u32 nvhost_ctrl_gpu::ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u
}
u32 nvhost_ctrl_gpu::ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output) {
LOG_WARNING(Service_NVDRV, "(STUBBED) called");
std::memset(output.data(), 0, output.size());
LOG_DEBUG(Service_NVDRV, "called");
IoctlNvgpuGpuZcullGetInfoArgs params{};
std::memcpy(&params, input.data(), input.size());
params.width_align_pixels = 0x20;
params.height_align_pixels = 0x20;
params.pixel_squares_by_aliquots = 0x400;
params.aliquot_total = 0x800;
params.region_byte_multiplier = 0x20;
params.region_header_size = 0x20;
params.subregion_header_size = 0xc0;
params.subregion_width_align_pixels = 0x20;
params.subregion_height_align_pixels = 0x40;
params.subregion_count = 0x10;
std::memcpy(output.data(), &params, output.size());
return 0;
}

View File

@@ -5,6 +5,7 @@
#include <map>
#include "common/assert.h"
#include "common/logging/log.h"
#include "core/core.h"
#include "core/hle/service/nvdrv/devices/nvhost_gpu.h"
namespace Service {
@@ -131,7 +132,7 @@ u32 nvhost_gpu::SubmitGPFIFO(const std::vector<u8>& input, std::vector<u8>& outp
params.num_entries * sizeof(IoctlGpfifoEntry));
for (auto entry : entries) {
VAddr va_addr = entry.Address();
// TODO(ogniK): Process these
Core::System::GetInstance().GPU().ProcessCommandList(va_addr, entry.sz);
}
params.fence_out.id = 0;
params.fence_out.value = 0;

View File

@@ -4,6 +4,7 @@
#pragma once
#include <memory>
#include <vector>
#include "common/common_types.h"
#include "common/swap.h"
@@ -12,12 +13,14 @@
namespace Service {
namespace Nvidia {
namespace Devices {
class nvmap;
constexpr u32 NVGPU_IOCTL_MAGIC('H');
constexpr u32 NVGPU_IOCTL_CHANNEL_SUBMIT_GPFIFO(0x8);
class nvhost_gpu final : public nvdevice {
public:
nvhost_gpu() = default;
nvhost_gpu(std::shared_ptr<nvmap> nvmap_dev) : nvmap_dev(std::move(nvmap_dev)) {}
~nvhost_gpu() override = default;
u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output) override;
@@ -132,6 +135,8 @@ private:
u32 AllocGPFIFOEx2(const std::vector<u8>& input, std::vector<u8>& output);
u32 AllocateObjectContext(const std::vector<u8>& input, std::vector<u8>& output);
u32 SubmitGPFIFO(const std::vector<u8>& input, std::vector<u8>& output);
std::shared_ptr<nvmap> nvmap_dev;
};
} // namespace Devices

View File

@@ -78,11 +78,10 @@ void NVDRV::QueryEvent(Kernel::HLERequestContext& ctx) {
u32 event_id = rp.Pop<u32>();
LOG_WARNING(Service_NVDRV, "(STUBBED) called, fd=%x, event_id=%x", fd, event_id);
IPC::ResponseBuilder rb{ctx, 2, 1};
IPC::ResponseBuilder rb{ctx, 3, 1};
rb.Push(RESULT_SUCCESS);
auto event = Kernel::Event::Create(Kernel::ResetType::Pulse, "NVEvent");
event->Signal();
rb.PushCopyObjects(event);
rb.PushCopyObjects(query_event);
rb.Push<u32>(0);
}
void NVDRV::SetClientPID(Kernel::HLERequestContext& ctx) {
@@ -113,6 +112,8 @@ NVDRV::NVDRV(std::shared_ptr<Module> nvdrv, const char* name)
{13, &NVDRV::FinishInitialize, "FinishInitialize"},
};
RegisterHandlers(functions);
query_event = Kernel::Event::Create(Kernel::ResetType::OneShot, "NVDRV::query_event");
}
} // namespace Nvidia

View File

@@ -6,6 +6,7 @@
#include <memory>
#include <string>
#include "core/hle/kernel/event.h"
#include "core/hle/service/nvdrv/nvdrv.h"
#include "core/hle/service/service.h"
@@ -29,6 +30,8 @@ private:
std::shared_ptr<Module> nvdrv;
u64 pid{};
Kernel::SharedPtr<Kernel::Event> query_event;
};
} // namespace Nvidia

View File

@@ -32,11 +32,11 @@ void InstallInterfaces(SM::ServiceManager& service_manager) {
Module::Module() {
auto nvmap_dev = std::make_shared<Devices::nvmap>();
devices["/dev/nvhost-as-gpu"] = std::make_shared<Devices::nvhost_as_gpu>(nvmap_dev);
devices["/dev/nvhost-gpu"] = std::make_shared<Devices::nvhost_gpu>(nvmap_dev);
devices["/dev/nvhost-ctrl-gpu"] = std::make_shared<Devices::nvhost_ctrl_gpu>();
devices["/dev/nvmap"] = nvmap_dev;
devices["/dev/nvdisp_disp0"] = std::make_shared<Devices::nvdisp_disp0>(nvmap_dev);
devices["/dev/nvhost-ctrl"] = std::make_shared<Devices::nvhost_ctrl>();
devices["/dev/nvhost-gpu"] = std::make_shared<Devices::nvhost_gpu>();
}
u32 Module::Open(std::string device_name) {

View File

@@ -40,7 +40,11 @@ u32 BufferQueue::DequeueBuffer(u32 pixel_format, u32 width, u32 height) {
return igbp_buffer.format == pixel_format && igbp_buffer.width == width &&
igbp_buffer.height == height;
});
ASSERT(itr != queue.end());
if (itr == queue.end()) {
LOG_CRITICAL(Service_NVDRV, "no free buffers for pixel_format=%d, width=%d, height=%d",
pixel_format, width, height);
itr = queue.begin();
}
itr->status = Buffer::Status::Dequeued;
return itr->slot;
@@ -54,12 +58,13 @@ const IGBPBuffer& BufferQueue::RequestBuffer(u32 slot) const {
return itr->igbp_buffer;
}
void BufferQueue::QueueBuffer(u32 slot) {
void BufferQueue::QueueBuffer(u32 slot, BufferTransformFlags transform) {
auto itr = std::find_if(queue.begin(), queue.end(),
[&](const Buffer& buffer) { return buffer.slot == slot; });
ASSERT(itr != queue.end());
ASSERT(itr->status == Buffer::Status::Dequeued);
itr->status = Buffer::Status::Queued;
itr->transform = transform;
}
boost::optional<const BufferQueue::Buffer&> BufferQueue::AcquireBuffer() {

View File

@@ -46,18 +46,32 @@ public:
BufferQueue(u32 id, u64 layer_id);
~BufferQueue() = default;
enum class BufferTransformFlags : u32 {
/// Flip source image horizontally (around the vertical axis)
FlipH = 0x01,
/// Flip source image vertically (around the horizontal axis)
FlipV = 0x02,
/// Rotate source image 90 degrees clockwise
Rotate90 = 0x04,
/// Rotate source image 180 degrees
Roate180 = 0x03,
/// Rotate source image 270 degrees clockwise
Roate270 = 0x07,
};
struct Buffer {
enum class Status { Free = 0, Queued = 1, Dequeued = 2, Acquired = 3 };
u32 slot;
Status status = Status::Free;
IGBPBuffer igbp_buffer;
BufferTransformFlags transform;
};
void SetPreallocatedBuffer(u32 slot, IGBPBuffer& buffer);
u32 DequeueBuffer(u32 pixel_format, u32 width, u32 height);
const IGBPBuffer& RequestBuffer(u32 slot) const;
void QueueBuffer(u32 slot);
void QueueBuffer(u32 slot, BufferTransformFlags transform);
boost::optional<const Buffer&> AcquireBuffer();
void ReleaseBuffer(u32 slot);
u32 Query(QueryType type);

View File

@@ -145,7 +145,7 @@ void NVFlinger::Compose() {
ASSERT(nvdisp);
nvdisp->flip(igbp_buffer.gpu_buffer_id, igbp_buffer.offset, igbp_buffer.format,
igbp_buffer.width, igbp_buffer.height, igbp_buffer.stride);
igbp_buffer.width, igbp_buffer.height, igbp_buffer.stride, buffer->transform);
buffer_queue->ReleaseBuffer(buffer->slot);
}

View File

@@ -3,7 +3,7 @@
// Refer to the license.txt file included.
#include <algorithm>
#include <array>
#include "common/alignment.h"
#include "common/scope_exit.h"
#include "core/core_timing.h"
@@ -101,8 +101,10 @@ public:
SerializeData();
Header header{};
header.data_offset = sizeof(Header);
header.data_size = static_cast<u32_le>(write_index - sizeof(Header));
header.data_offset = sizeof(Header);
header.objects_size = 4;
header.objects_offset = sizeof(Header) + header.data_size;
std::memcpy(buffer.data(), &header, sizeof(Header));
return buffer;
@@ -142,11 +144,11 @@ protected:
private:
struct Data {
u32_le magic = 2;
u32_le process_id;
u32_le process_id = 1;
u32_le id;
INSERT_PADDING_BYTES(0xC);
INSERT_PADDING_WORDS(3);
std::array<u8, 8> dispdrv = {'d', 'i', 's', 'p', 'd', 'r', 'v', '\0'};
INSERT_PADDING_BYTES(8);
INSERT_PADDING_WORDS(2);
};
static_assert(sizeof(Data) == 0x28, "ParcelData has wrong size");
@@ -211,7 +213,6 @@ public:
void DeserializeData() override {
std::u16string token = ReadInterfaceToken();
data = Read<Data>();
ASSERT(data.graphic_buffer_length == sizeof(NVFlinger::IGBPBuffer));
buffer = Read<NVFlinger::IGBPBuffer>();
}
@@ -261,6 +262,11 @@ public:
Data data;
};
// TODO(bunnei): Remove this. When set to 1, games will think a fence is valid and boot further.
// This will break libnx and potentially other apps that more stringently check this. This is here
// purely as a convenience, and should go away once we implement fences.
static constexpr u32 FENCE_HACK = 0;
class IGBPDequeueBufferResponseParcel : public Parcel {
public:
explicit IGBPDequeueBufferResponseParcel(u32 slot) : Parcel(), slot(slot) {}
@@ -268,11 +274,20 @@ public:
protected:
void SerializeData() override {
Write(slot);
// TODO(Subv): Find out how this Fence is used.
std::array<u32_le, 11> fence = {};
Write(fence);
Write<u32_le>(0);
// TODO(bunnei): Find out what this all means. Writing anything non-zero here breaks libnx.
Write<u32>(0);
Write<u32>(FENCE_HACK);
Write<u32>(0);
Write<u32>(0);
Write<u32>(0);
Write<u32>(0);
Write<u32>(0);
Write<u32>(0);
Write<u32>(0);
Write<u32>(0);
Write<u32>(0);
Write<u32>(0);
Write<u32>(0);
}
u32_le slot;
@@ -301,14 +316,11 @@ public:
protected:
void SerializeData() override {
// TODO(Subv): Find out what this all means
Write<u32_le>(1);
Write<u32_le>(sizeof(NVFlinger::IGBPBuffer));
Write<u32_le>(0); // Unknown
// TODO(bunnei): Find out what this all means. Writing anything non-zero here breaks libnx.
Write<u32_le>(0);
Write<u32_le>(FENCE_HACK);
Write<u32_le>(0);
Write(buffer);
Write<u32_le>(0);
}
@@ -327,13 +339,29 @@ public:
data = Read<Data>();
}
struct Fence {
u32_le id;
u32_le value;
};
static_assert(sizeof(Fence) == 8, "Fence has wrong size");
struct Data {
u32_le slot;
INSERT_PADDING_WORDS(2);
INSERT_PADDING_WORDS(3);
u32_le timestamp;
INSERT_PADDING_WORDS(20);
s32_le is_auto_timestamp;
s32_le crop_left;
s32_le crop_top;
s32_le crop_right;
s32_le crop_bottom;
s32_le scaling_mode;
NVFlinger::BufferQueue::BufferTransformFlags transform;
u32_le sticky_transform;
INSERT_PADDING_WORDS(2);
u32_le fence_is_valid;
std::array<Fence, 2> fences;
};
static_assert(sizeof(Data) == 96, "ParcelData has wrong size");
static_assert(sizeof(Data) == 80, "ParcelData has wrong size");
Data data;
};
@@ -401,7 +429,7 @@ public:
{0, &IHOSBinderDriver::TransactParcel, "TransactParcel"},
{1, &IHOSBinderDriver::AdjustRefcount, "AdjustRefcount"},
{2, &IHOSBinderDriver::GetNativeHandle, "GetNativeHandle"},
{3, nullptr, "TransactParcelAuto"},
{3, &IHOSBinderDriver::TransactParcelAuto, "TransactParcelAuto"},
};
RegisterHandlers(functions);
}
@@ -425,35 +453,23 @@ private:
SetPreallocatedBuffer = 14
};
void TransactParcel(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp{ctx};
u32 id = rp.Pop<u32>();
auto transaction = static_cast<TransactionId>(rp.Pop<u32>());
u32 flags = rp.Pop<u32>();
auto& input_buffer = ctx.BufferDescriptorA()[0];
std::vector<u8> input_data(input_buffer.Size());
Memory::ReadBlock(input_buffer.Address(), input_data.data(), input_buffer.Size());
auto& output_buffer = ctx.BufferDescriptorB()[0];
void TransactParcel(u32 id, TransactionId transaction, const std::vector<u8>& input_data,
VAddr output_addr, u64 output_size) {
auto buffer_queue = nv_flinger->GetBufferQueue(id);
LOG_WARNING(Service_VI, "(STUBBED) called, transaction=%x", transaction);
if (transaction == TransactionId::Connect) {
IGBPConnectRequestParcel request{input_data};
IGBPConnectResponseParcel response{1280, 720};
auto response_buffer = response.Serialize();
Memory::WriteBlock(output_buffer.Address(), response_buffer.data(),
output_buffer.Size());
std::vector<u8> response_buffer = response.Serialize();
Memory::WriteBlock(output_addr, response_buffer.data(), response_buffer.size());
} else if (transaction == TransactionId::SetPreallocatedBuffer) {
IGBPSetPreallocatedBufferRequestParcel request{input_data};
buffer_queue->SetPreallocatedBuffer(request.data.slot, request.buffer);
IGBPSetPreallocatedBufferResponseParcel response{};
auto response_buffer = response.Serialize();
Memory::WriteBlock(output_buffer.Address(), response_buffer.data(),
output_buffer.Size());
std::vector<u8> response_buffer = response.Serialize();
Memory::WriteBlock(output_addr, response_buffer.data(), response_buffer.size());
} else if (transaction == TransactionId::DequeueBuffer) {
IGBPDequeueBufferRequestParcel request{input_data};
@@ -461,27 +477,24 @@ private:
request.data.height);
IGBPDequeueBufferResponseParcel response{slot};
auto response_buffer = response.Serialize();
Memory::WriteBlock(output_buffer.Address(), response_buffer.data(),
output_buffer.Size());
std::vector<u8> response_buffer = response.Serialize();
Memory::WriteBlock(output_addr, response_buffer.data(), response_buffer.size());
} else if (transaction == TransactionId::RequestBuffer) {
IGBPRequestBufferRequestParcel request{input_data};
auto& buffer = buffer_queue->RequestBuffer(request.slot);
IGBPRequestBufferResponseParcel response{buffer};
auto response_buffer = response.Serialize();
Memory::WriteBlock(output_buffer.Address(), response_buffer.data(),
output_buffer.Size());
std::vector<u8> response_buffer = response.Serialize();
Memory::WriteBlock(output_addr, response_buffer.data(), response_buffer.size());
} else if (transaction == TransactionId::QueueBuffer) {
IGBPQueueBufferRequestParcel request{input_data};
buffer_queue->QueueBuffer(request.data.slot);
buffer_queue->QueueBuffer(request.data.slot, request.data.transform);
IGBPQueueBufferResponseParcel response{1280, 720};
auto response_buffer = response.Serialize();
Memory::WriteBlock(output_buffer.Address(), response_buffer.data(),
output_buffer.Size());
std::vector<u8> response_buffer = response.Serialize();
Memory::WriteBlock(output_addr, response_buffer.data(), response_buffer.size());
} else if (transaction == TransactionId::Query) {
IGBPQueryRequestParcel request{input_data};
@@ -489,12 +502,46 @@ private:
buffer_queue->Query(static_cast<NVFlinger::BufferQueue::QueryType>(request.type));
IGBPQueryResponseParcel response{value};
auto response_buffer = response.Serialize();
Memory::WriteBlock(output_buffer.Address(), response_buffer.data(),
output_buffer.Size());
std::vector<u8> response_buffer = response.Serialize();
Memory::WriteBlock(output_addr, response_buffer.data(), response_buffer.size());
} else if (transaction == TransactionId::CancelBuffer) {
LOG_WARNING(Service_VI, "(STUBBED) called, transaction=CancelBuffer");
} else {
ASSERT_MSG(false, "Unimplemented");
}
}
void TransactParcel(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp{ctx};
u32 id = rp.Pop<u32>();
auto transaction = static_cast<TransactionId>(rp.Pop<u32>());
u32 flags = rp.Pop<u32>();
LOG_DEBUG(Service_VI, "called, transaction=%x", transaction);
auto& input_buffer = ctx.BufferDescriptorA()[0];
auto& output_buffer = ctx.BufferDescriptorB()[0];
std::vector<u8> input_data(input_buffer.Size());
Memory::ReadBlock(input_buffer.Address(), input_data.data(), input_buffer.Size());
TransactParcel(id, transaction, input_data, output_buffer.Address(), output_buffer.Size());
IPC::ResponseBuilder rb{ctx, 2};
rb.Push(RESULT_SUCCESS);
}
void TransactParcelAuto(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp{ctx};
u32 id = rp.Pop<u32>();
auto transaction = static_cast<TransactionId>(rp.Pop<u32>());
u32 flags = rp.Pop<u32>();
LOG_DEBUG(Service_VI, "called, transaction=%x", transaction);
auto& input_buffer = ctx.BufferDescriptorX()[0];
auto& output_buffer = ctx.BufferDescriptorC()[0];
std::vector<u8> input_data(input_buffer.size);
Memory::ReadBlock(input_buffer.Address(), input_data.data(), input_buffer.size);
TransactParcel(id, transaction, input_data, output_buffer.Address(), output_buffer.Size());
IPC::ResponseBuilder rb{ctx, 2};
rb.Push(RESULT_SUCCESS);
@@ -527,7 +574,7 @@ private:
}
std::shared_ptr<NVFlinger::NVFlinger> nv_flinger;
};
}; // namespace VI
class ISystemDisplayService final : public ServiceFramework<ISystemDisplayService> {
public:
@@ -657,12 +704,12 @@ void IApplicationDisplayService::CloseDisplay(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp{ctx};
u64 display_id = rp.Pop<u64>();
IPC::ResponseBuilder rb = rp.MakeBuilder(4, 0, 0);
IPC::ResponseBuilder rb = rp.MakeBuilder(2, 0, 0);
rb.Push(RESULT_SUCCESS);
}
void IApplicationDisplayService::OpenLayer(Kernel::HLERequestContext& ctx) {
LOG_WARNING(Service_VI, "(STUBBED) called");
LOG_DEBUG(Service_VI, "called");
IPC::RequestParser rp{ctx};
auto name_buf = rp.PopRaw<std::array<u8, 0x40>>();
auto end = std::find(name_buf.begin(), name_buf.end(), '\0');
@@ -687,7 +734,7 @@ void IApplicationDisplayService::OpenLayer(Kernel::HLERequestContext& ctx) {
}
void IApplicationDisplayService::CreateStrayLayer(Kernel::HLERequestContext& ctx) {
LOG_WARNING(Service, "(STUBBED) called");
LOG_DEBUG(Service_VI, "called");
IPC::RequestParser rp{ctx};
u32 flags = rp.Pop<u32>();

View File

@@ -25,10 +25,11 @@ namespace Memory {
* Page size used by the ARM architecture. This is the smallest granularity with which memory can
* be mapped.
*/
const int PAGE_BITS = 12;
const u64 PAGE_SIZE = 1 << PAGE_BITS;
const u64 PAGE_MASK = PAGE_SIZE - 1;
const size_t PAGE_TABLE_NUM_ENTRIES = 1ULL << (36 - PAGE_BITS);
constexpr size_t PAGE_BITS = 12;
constexpr u64 PAGE_SIZE = 1 << PAGE_BITS;
constexpr u64 PAGE_MASK = PAGE_SIZE - 1;
constexpr size_t ADDRESS_SPACE_BITS = 36;
constexpr size_t PAGE_TABLE_NUM_ENTRIES = 1ULL << (ADDRESS_SPACE_BITS - PAGE_BITS);
enum class PageType : u8 {
/// Page is unmapped and should cause an access error.

View File

@@ -1,4 +1,15 @@
add_library(video_core STATIC
command_processor.cpp
command_processor.h
engines/fermi_2d.cpp
engines/fermi_2d.h
engines/maxwell_3d.cpp
engines/maxwell_3d.h
engines/maxwell_compute.cpp
engines/maxwell_compute.h
gpu.h
memory_manager.cpp
memory_manager.h
renderer_base.cpp
renderer_base.h
renderer_opengl/gl_resource_manager.h

View File

@@ -0,0 +1,119 @@
// Copyright 2018 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include <array>
#include <cstddef>
#include <memory>
#include <utility>
#include "common/assert.h"
#include "common/logging/log.h"
#include "common/microprofile.h"
#include "common/vector_math.h"
#include "core/memory.h"
#include "core/tracer/recorder.h"
#include "video_core/command_processor.h"
#include "video_core/engines/fermi_2d.h"
#include "video_core/engines/maxwell_3d.h"
#include "video_core/engines/maxwell_compute.h"
#include "video_core/gpu.h"
#include "video_core/renderer_base.h"
#include "video_core/video_core.h"
namespace Tegra {
enum class BufferMethods {
BindObject = 0,
CountBufferMethods = 0x100,
};
void GPU::WriteReg(u32 method, u32 subchannel, u32 value) {
LOG_WARNING(HW_GPU, "Processing method %08X on subchannel %u value %08X", method, subchannel,
value);
if (method == static_cast<u32>(BufferMethods::BindObject)) {
// Bind the current subchannel to the desired engine id.
LOG_DEBUG(HW_GPU, "Binding subchannel %u to engine %u", subchannel, value);
ASSERT(bound_engines.find(subchannel) == bound_engines.end());
bound_engines[subchannel] = static_cast<EngineID>(value);
return;
}
if (method < static_cast<u32>(BufferMethods::CountBufferMethods)) {
// TODO(Subv): Research and implement these methods.
LOG_ERROR(HW_GPU, "Special buffer methods other than Bind are not implemented");
return;
}
ASSERT(bound_engines.find(subchannel) != bound_engines.end());
const EngineID engine = bound_engines[subchannel];
switch (engine) {
case EngineID::FERMI_TWOD_A:
fermi_2d->WriteReg(method, value);
break;
case EngineID::MAXWELL_B:
maxwell_3d->WriteReg(method, value);
break;
case EngineID::MAXWELL_COMPUTE_B:
maxwell_compute->WriteReg(method, value);
break;
default:
UNIMPLEMENTED();
}
}
void GPU::ProcessCommandList(GPUVAddr address, u32 size) {
// TODO(Subv): PhysicalToVirtualAddress is a misnomer, it converts a GPU VAddr into an
// application VAddr.
const VAddr head_address = memory_manager->PhysicalToVirtualAddress(address);
VAddr current_addr = head_address;
while (current_addr < head_address + size * sizeof(CommandHeader)) {
const CommandHeader header = {Memory::Read32(current_addr)};
current_addr += sizeof(u32);
switch (header.mode.Value()) {
case SubmissionMode::IncreasingOld:
case SubmissionMode::Increasing: {
// Increase the method value with each argument.
for (unsigned i = 0; i < header.arg_count; ++i) {
WriteReg(header.method + i, header.subchannel, Memory::Read32(current_addr));
current_addr += sizeof(u32);
}
break;
}
case SubmissionMode::NonIncreasingOld:
case SubmissionMode::NonIncreasing: {
// Use the same method value for all arguments.
for (unsigned i = 0; i < header.arg_count; ++i) {
WriteReg(header.method, header.subchannel, Memory::Read32(current_addr));
current_addr += sizeof(u32);
}
break;
}
case SubmissionMode::IncreaseOnce: {
ASSERT(header.arg_count.Value() >= 1);
// Use the original method for the first argument and then the next method for all other
// arguments.
WriteReg(header.method, header.subchannel, Memory::Read32(current_addr));
current_addr += sizeof(u32);
// Use the same method value for all arguments.
for (unsigned i = 1; i < header.arg_count; ++i) {
WriteReg(header.method + 1, header.subchannel, Memory::Read32(current_addr));
current_addr += sizeof(u32);
}
break;
}
case SubmissionMode::Inline: {
// The register value is stored in the bits 16-28 as an immediate
WriteReg(header.method, header.subchannel, header.inline_data);
break;
}
default:
UNIMPLEMENTED();
}
}
}
} // namespace Tegra

View File

@@ -0,0 +1,39 @@
// Copyright 2018 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <type_traits>
#include "common/bit_field.h"
#include "common/common_types.h"
namespace Tegra {
enum class SubmissionMode : u32 {
IncreasingOld = 0,
Increasing = 1,
NonIncreasingOld = 2,
NonIncreasing = 3,
Inline = 4,
IncreaseOnce = 5
};
union CommandHeader {
u32 hex;
BitField<0, 13, u32> method;
BitField<13, 3, u32> subchannel;
BitField<16, 13, u32> arg_count;
BitField<16, 13, u32> inline_data;
BitField<29, 3, SubmissionMode> mode;
};
static_assert(std::is_standard_layout<CommandHeader>::value == true,
"CommandHeader does not use standard layout");
static_assert(sizeof(CommandHeader) == sizeof(u32), "CommandHeader has incorrect size!");
void ProcessCommandList(VAddr address, u32 size);
} // namespace Tegra

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@@ -0,0 +1,13 @@
// Copyright 2018 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "video_core/engines/fermi_2d.h"
namespace Tegra {
namespace Engines {
void Fermi2D::WriteReg(u32 method, u32 value) {}
} // namespace Engines
} // namespace Tegra

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@@ -0,0 +1,22 @@
// Copyright 2018 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "common/common_types.h"
namespace Tegra {
namespace Engines {
class Fermi2D final {
public:
Fermi2D() = default;
~Fermi2D() = default;
/// Write the value to the register identified by method.
void WriteReg(u32 method, u32 value);
};
} // namespace Engines
} // namespace Tegra

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@@ -0,0 +1,13 @@
// Copyright 2018 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "video_core/engines/maxwell_3d.h"
namespace Tegra {
namespace Engines {
void Maxwell3D::WriteReg(u32 method, u32 value) {}
} // namespace Engines
} // namespace Tegra

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@@ -0,0 +1,22 @@
// Copyright 2018 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "common/common_types.h"
namespace Tegra {
namespace Engines {
class Maxwell3D final {
public:
Maxwell3D() = default;
~Maxwell3D() = default;
/// Write the value to the register identified by method.
void WriteReg(u32 method, u32 value);
};
} // namespace Engines
} // namespace Tegra

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@@ -0,0 +1,13 @@
// Copyright 2018 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "video_core/engines/maxwell_compute.h"
namespace Tegra {
namespace Engines {
void MaxwellCompute::WriteReg(u32 method, u32 value) {}
} // namespace Engines
} // namespace Tegra

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@@ -0,0 +1,22 @@
// Copyright 2018 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "common/common_types.h"
namespace Tegra {
namespace Engines {
class MaxwellCompute final {
public:
MaxwellCompute() = default;
~MaxwellCompute() = default;
/// Write the value to the register identified by method.
void WriteReg(u32 method, u32 value);
};
} // namespace Engines
} // namespace Tegra

55
src/video_core/gpu.h Normal file
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@@ -0,0 +1,55 @@
// Copyright 2018 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <memory>
#include <unordered_map>
#include "common/common_types.h"
#include "video_core/engines/fermi_2d.h"
#include "video_core/engines/maxwell_3d.h"
#include "video_core/engines/maxwell_compute.h"
#include "video_core/memory_manager.h"
namespace Tegra {
enum class EngineID {
FERMI_TWOD_A = 0x902D, // 2D Engine
MAXWELL_B = 0xB197, // 3D Engine
MAXWELL_COMPUTE_B = 0xB1C0,
KEPLER_INLINE_TO_MEMORY_B = 0xA140,
MAXWELL_DMA_COPY_A = 0xB0B5,
};
class GPU final {
public:
GPU() {
memory_manager = std::make_unique<MemoryManager>();
maxwell_3d = std::make_unique<Engines::Maxwell3D>();
fermi_2d = std::make_unique<Engines::Fermi2D>();
maxwell_compute = std::make_unique<Engines::MaxwellCompute>();
}
~GPU() = default;
/// Processes a command list stored at the specified address in GPU memory.
void ProcessCommandList(GPUVAddr address, u32 size);
std::unique_ptr<MemoryManager> memory_manager;
private:
/// Writes a single register in the engine bound to the specified subchannel
void WriteReg(u32 method, u32 subchannel, u32 value);
/// Mapping of command subchannels to their bound engine ids.
std::unordered_map<u32, EngineID> bound_engines;
/// 3D engine
std::unique_ptr<Engines::Maxwell3D> maxwell_3d;
/// 2D engine
std::unique_ptr<Engines::Fermi2D> fermi_2d;
/// Compute engine
std::unique_ptr<Engines::MaxwellCompute> maxwell_compute;
};
} // namespace Tegra

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@@ -3,10 +3,9 @@
// Refer to the license.txt file included.
#include "common/assert.h"
#include "core/hle/service/nvdrv/memory_manager.h"
#include "video_core/memory_manager.h"
namespace Service {
namespace Nvidia {
namespace Tegra {
PAddr MemoryManager::AllocateSpace(u64 size, u64 align) {
boost::optional<PAddr> paddr = FindFreeBlock(size, align);
@@ -108,5 +107,4 @@ VAddr& MemoryManager::PageSlot(PAddr paddr) {
return (*block)[(paddr >> Memory::PAGE_BITS) & PAGE_BLOCK_MASK];
}
} // namespace Nvidia
} // namespace Service
} // namespace Tegra

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@@ -9,8 +9,10 @@
#include "common/common_types.h"
#include "core/memory.h"
namespace Service {
namespace Nvidia {
namespace Tegra {
/// Virtual addresses in the GPU's memory map are 64 bit.
using GPUVAddr = u64;
class MemoryManager final {
public:
@@ -44,5 +46,4 @@ private:
std::array<std::unique_ptr<PageBlock>, PAGE_TABLE_SIZE> page_table{};
};
} // namespace Nvidia
} // namespace Service
} // namespace Tegra

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@@ -43,6 +43,7 @@ public:
u32 height;
u32 stride;
PixelFormat pixel_format;
bool flip_vertical;
};
virtual ~RendererBase() {}

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@@ -262,6 +262,8 @@ void RendererOpenGL::LoadFBToScreenInfo(const FramebufferInfo& framebuffer_info,
// only allows rows to have a memory alignement of 4.
ASSERT(framebuffer_info.stride % 4 == 0);
framebuffer_flip_vertical = framebuffer_info.flip_vertical;
// Reset the screen info's display texture to its own permanent texture
screen_info.display_texture = screen_info.texture.resource.handle;
screen_info.display_texcoords = MathUtil::Rectangle<float>(0.f, 0.f, 1.f, 1.f);
@@ -401,13 +403,15 @@ void RendererOpenGL::ConfigureFramebufferTexture(TextureInfo& texture,
void RendererOpenGL::DrawSingleScreen(const ScreenInfo& screen_info, float x, float y, float w,
float h) {
auto& texcoords = screen_info.display_texcoords;
const auto& texcoords = screen_info.display_texcoords;
const auto& left = framebuffer_flip_vertical ? texcoords.right : texcoords.left;
const auto& right = framebuffer_flip_vertical ? texcoords.left : texcoords.right;
std::array<ScreenRectVertex, 4> vertices = {{
ScreenRectVertex(x, y, texcoords.top, texcoords.right),
ScreenRectVertex(x + w, y, texcoords.bottom, texcoords.right),
ScreenRectVertex(x, y + h, texcoords.top, texcoords.left),
ScreenRectVertex(x + w, y + h, texcoords.bottom, texcoords.left),
ScreenRectVertex(x, y, texcoords.top, right),
ScreenRectVertex(x + w, y, texcoords.bottom, right),
ScreenRectVertex(x, y + h, texcoords.top, left),
ScreenRectVertex(x + w, y + h, texcoords.bottom, left),
}};
state.texture_units[0].texture_2d = screen_info.display_texture;

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@@ -86,4 +86,7 @@ private:
// Shader attribute input indices
GLuint attrib_position;
GLuint attrib_tex_coord;
/// Flips the framebuffer vertically when true
bool framebuffer_flip_vertical;
};